fft latency problem in nrf52

[bigzero]

i am working using NRF52, s132, sdk11, freertos.

for fft , i used "arm_rfft_fast_f32(...)" in cmsis-dsp library.

and i inserted a fpu interrupt.

NVIC_SetPriority(FPU_IRQn, APP_IRQ_PRIORITY_LOW);
NVIC_ClearPendingIRQ(FPU_IRQn);
NVIC_EnableIRQ(FPU_IRQn);

void FPU_IRQHandler(void)
{
     uint32_t *fpscr = (uint32_t *)(FPU->FPCAR+0x40);
     (void)__get_FPSCR();
      NVIC_ClearPendingIRQ(FPU_IRQn);

     *fpscr = *fpscr & ~(FPU_EXCEPTION_MASK);
}

if i enable a FPU_IRQ, the fft latency is very long.

if i disalbe a FPU_IRQ, the fft latency is very fast. but I can't enter to sleep.

and system is very unstable.

i would like to know the best setting for a fft performance in freertos+s132+nrf52.

thank you

[Susheel Nuguru]

I think you have enable FPU in ARM core

Either enable __FPU_USED then the system_nrf52.c file OR

do it manually where you want to enable it like below

SCB->CPACR |= (3UL << 20) | (3UL << 22);
__DSB();
__ISB();

and disable it when you want to save power when you know its being not used by

SCB->CPACR = 0; 
__DSB();
__ISB();

In assembly you can do like this

[Susheel Nuguru]

quote

9.1 Floating point interrupt
The floating point unit (FPU) may generate exceptions when used due to e.g. overflow or underflow. These exceptions will trigger the FPU interrupt (see Instantiation on page 25). To clear the IRQ line when an exception has occurred, the relevant exception bit within the FPSCR register needs to be cleared. For more information about the FPSCR or other FPU registers, see Cortex-M4 Devices Generic User Guide

Are you checking for these bits in FPSCR and clearing them ? I do not know the latency for arm_rfft_fast_f32 on nrf52.