nRF52832 MPU TEX,S,B,C bits setup

[tkorsdal]

I am having problems getting the memory protection to work.

I have not found a clear definition on how to configure the TEX,S,C & B bits for the various memory regions in the nRF52832.

Anyone with sample code or information on this?

[Hung Bui]

@tkorsdal: I'm afraid that we don't have any example for the Cortex M4 MPU. The best source for explanation of the register should be from the "ARMv7-M Architecture Reference Manual" at section B3.5.9

What exactly you want to do with the memory protection ? Would the BPROT and the MWU on the nRF52 can do the job ?