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Stuck in high current state during nRF52832 startup

Folks,

Have a very puzzling problem (which means I must have done something really silly :-)

Built a prototype in which the nRF52 section is a clone of the one in the nRF52-DK. Vcc at 3.3v is supplied by a TI TLV7163318 dual-LDO, powered by a LiPo cell (plenty large). LDO is rated at 150ma per output (3.3v and 1.8v in this case, no load on the 1.8v right now). It also has short-circuit and startup inrush protection.

Built two units, both perform exactly the same on power-up. Namely the LDO goes into overload protection mode and drops the output from 3.3v to about 2.4v. And the supply current is close to 100ma!!!

Did the usual checks. All pins except ANT and Vss are tens of megohms to ground. ANT is a couple ohms (presume it goes through an internal balun output coil to Vss).

Noticed that the spec for the nRF52382 specifies that the power-up rise time from 0 to 1.7v should be less than 60ms. Should not have been a problem even with the LDO inrush limit (~180ma), which should have charged the 4.7µF filter cap in under 100µs.

Used an external 3.3vdc high-current-capacity supply and powered up Vdd (isolated from the LDO). Better results. Current is now in the 4ma vicinity, but still hard to measure with a DVM because it appears to be fluctuating(?). Should probably scope it.

BTW, have a good analog scope (Tektronix 2465B) but not a storage scope, so hard to monitor single-trace events like power up.

Boards were soldered in a (hobbyist) computer-controlled reflow oven. Actual temp curve closely matched programmed curve. Great visual results (under stereo microscope and ohmmeter inspection). Could the chips have been damaged in the process? Seems unlikely.

Has anyone else seen this kind of behavior? Until I find a storage scope and look at the power up voltage and current ramps, I'm at a loss on how to proceed.

Mike (puzzled in Palo Alto)

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  • Hey, folks, Philip is having a bit of fun with us here (at me expense -- well deserved :-) Visited his shop a couple days ago and he found the problem. Great to have a second set of eyes look at the issue, especially as eagle-eyed and skilled as his. FYI, the problem was due to a confluence of factors: too close spacing of some components on the board, lack of solder mask between them (PCB vendor?), and too much solder paste applied before reflow. In any case, two separate boards reflowed with exactly the same problems: a solder bridge between DEC2 and DEC3, and a short between two other caps (one of the high-freq crystal caps and another). So case closed. Big thanks to Philip. Mike

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