As described in the product specification of nRF52832, the SPI Slave interface use two memory pointers, RXD.PTR and TXD.PTR, to point to memory buffers. As these are located in RAM, they can be accessed by both CPU and the SPIS interface. A semaphore is used to aquire access to these registers, to avoid interfering with CPU activity. The semaphore is tried aquired on CSN pin low drive, and released when CSN goes high again. It is therefore not possible to use SPIS without the CSN pin, as this signal is needed to know when to aquire the semaphore.
What about if I use a pin which is not connected to the master but it's hold permanently low on the slave? This way the SPIS thinks it can always grant the semaphore. Could this work?
What about if I use a pin which is not connected to the master but it's hold permanently low on the slave? This way the SPIS thinks it can always grant the semaphore. Could this work?
