Minimum clock speed for SWD?

[CurtisHx]

We're trying to bit-bang SWD to program an nRF52832, and we're running into some problems getting the nRF52 to respond. One theory is we're not generating a high enough clock speed. Right now we're using a 10khz clock.

What's the minimum clock speed for SWD? Where can I find electrical specifications in general for SWD? I can't find them in the ARM Debug Interface Architecture Specification

[slowcoder]

In case anyone else plays around with very slow SWD (and, as this is the only relevant discussion on the internet about the slowest SWD speed), I just discovered that the nRF51 does indeed not ACK (or, clock out anything) if you're running at 18KHz. After clocking up to 190KHz (no other changes), the nRF51 started to respond.

[slowcoder]

I guess that depends on what state SWCLK/SWDIO is in when it stops, and for how long a "moment" is. If both lines are low for 100uS or longer (not entirely sure about this value), I guess the nRF51 could interpret it as a reset due to the shared SWDIO/nRESET functionality.

However, if you're just talking about very minor changes in timing, it seems to handle that well. Every now and then the MCU that I'm implementing this on wants to service an IRQ or something else, and I get a SWCLK that's about twice as long. The nRF51 seems to handle this just fine.