Figure 222 of the OP spec states "important: no components in bottom layer". Are you recommending that we keep the bottom side clear under/near the nRF52840? This feels a bit onerous in terms of small/space constrained implementations. Can you expand on this note?
Also, in terms of the thru-vias in the exposed GND pad is there any characterization of lost performance if these vias are reduced, exchanged for uvias to the next layer, or removed and connected on the top sheet?
Thanks.