ESD test of NRF51822 fail

[mansfield]

Hi,

We designed the circuit followed the reference circuit(QFN48), and all the value of power capacities are also followed the reference circuit. But we failed in the 8kv ESD test.

We added 2 capacities of 10uF at VDD pin, and then we can pass 7kv test now. Now we plan to add more capacities at power pins.

But we don't know if every power pin can add more capacities. For example, can we add capacities of 1uf(or other value) at DEC1, DEC2, VDD_PA, AVDD?

We can't find answers in the datasheet, can you give us some suggestions please?

[Jørn]

Hello Mansfield

The safety and performance for the nRF51822 is only guaranteed for up to 4 kV with the Human Body Model, or 750 V with the Charged Device Model, as stated in the Absolute maximum ratings in the datasheet, so the 8kV ESD test is outside the spec and we cannot guarantee its performance.

Changing the capacitance of the VDD pin should be fine as long as the supply rise time is within specification.

If the DC/DC converter is used, adding additional capacitance to AVDD is not recommended as it can affect startup times of hardware in the chip.

Adding additional capacitance to DEC1 and DEC2 is not recommended as it can affect the startup time of hardware in the chip, which can affect system stability.

Adding additional capacitance to VDD_PA is not recommended as it can affect radio performance.

Best regards

Jørn Frøysa

[mansfield]

Thank you！ We have tried some solutions, but can't pass the test still. The CPU always reset while ESD testing.

The 8kv ESD power is appled on a mirco-USB shell, and then the CPU reset. The reset source REG can't indecate any reset reason. And we monitored the 3.3V power but didn't find the power fall.

So are there any reasons that can cause the CPU resetting? Such as power peak, disturbs on IO port......

A short disturb of several KV on power or IO port will cause a protection reset of CPU?