SPI MISO is missing pulldow

Question

Hello,
I did used nrf_drv_spis.c (SDK SPI Slave) with nrf_drv_spi.c (SDK SPI Master). And I notice that both module configure SPI MISO line as input without any pull (neither up nor down).
In datasheet for SPIS block is written "The MISO line is set in high impedance as long as the SPI slave is not selected with CSN." 
 This effectively sets pin floating. For floating pins typically there is big power consumption ~100uA (compared to sleep 2uA) 
 I think SDK shall be rewritten for SPI Master to configure MISO line with pull-down to ensure correct power consumption. Is it not so?

vit bernatik · Accepted Answer

SDK can be modifed in function: nrf_drv_spi_init() the line: nrf_gpio_cfg_input(miso_pin, NRF_GPIO_PIN_NOPULL); can be changed into: nrf_gpio_cfg_input(miso_pin,NRF_GPIO_PIN_PULLDOWN); . This will solve possible higher nRF consumption when SPI MISO is disconnected when Chip Select is disabled. 
 Adding pull down has also disadvantage - it actually increase power consumption of SPI slave during SPI transfer and it may slow down maximum possible SPI frequency depending on SPI Slave MISO pin drive strength. So the best if user disables MISO pulldown every time he activate ChipSelect of any SPI slave. And reenable MISO pulldown just after deselects SPI Chip Select. 
 Note that floating pin power consumption is hard to detect. It may not be visible on development kit or when you have attached logic analyzer, but it may appear in product. To check if your input pin is configured properly and not posing possibility to increase chip power consumption you can check with signal generator. Set it to 1MHz square wave. Amplitude according your Vcc. Duty 50%. Then add generator signal to input pin but through some big serial resistor (for example 300K ohm). If input pin has pull down or externally the line is pulled down/up then nRF chip power consumption shall not increase. If pin is set input and there is no driver setting line to 0 or 1 then attached signal generator start to toggle pin and nRF chip internal logic start to detect pin changes and it start to have high power consumption. Power consumption is proportional to frequency. So if you increase frequency more than 1Mhz to the nRF floating input then power consumption of nRF chip also increases. For my measurement on floating input pin I measured instead of 2uA in sleep 100uA (@1MHz input signal).

SPI MISO is missing pulldow

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