Power Consumption in Deep Sleep Mode without Pin Reset

[Nobody13]

I've discoverd a strange behaviour with nrf51822 CEAAD00 Revision 2.

I am using NRF_POWER->SYSTEMOFF = 1; for powering down the chip and a sense signal for wakeing up.

However power consumption isn't as excepted. The chip sometimes consumes ~5mA in deep sleep mode and 2,3mA in active mode. The measuring system is correct and serveral other potencial errors (plugged programmer cable, uart cabel) aren't the cause of the problem. But i guess the chip is sometimes still in debug mode, so deep sleep mode is just simulated.

After i reset the chip via nrfjprog.exe --pinreset deep sleep mode works perfectly.

Does anybody know what why? What does a pin reset do?

[endnode]

Hi Nobody,

I would have the same question as Dave: how do you know that chip really entered SYSTEM OFF ("deep sleep" is confusing, there is nothing called like that on nRF5x;)? Do you have e.g. some GPIO or UART debug line which clearly shows that chip never returns from particular call (if you use Soft Device then you either need to disable it first or use sd_power_system_off call) and similar at system start up to show that it was in SYSTEM OFF until it got GPIOTE wake-up?

Cheers Jan

[Nobody13]

I think so. I used a LED as indicating label if chip is in system on or in system off state. After switching off, LED is off.

After serveral tests it seems that debug mode is sometimes accidentally entered. Despited pin reset. 19 of 20 switch off works, one not.

The SWDCLK pin seems to be in a floating state, causing the chip sometimes to start in debug mode. I think I try a pulldown resistor of 1kOhm on the SWDCLK. Despite documentation...