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JTAG Debug Specification for nRF24LE

Hi Nordic team,

Do you publish the JTAG Debug specification for nRF24LE? I am interested in developing a low-cost debug probe for nRF24LE for SDCDB.

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  • I am interested in debugging and not programming. The nRF24L _Product_Specification_rev1_6 document mentioned that HW debugger support (section 27) is available. And the JTAG pins are (on 32-pin chip):

    P1.3 => OCITO (out)

    P1.2 => OCITDO (out)

    P1.1 => OCITDI (in)

    P1.0 => OCITMS (in)

    P0.7 => OCITCK (in)

    The document however lacks information on JTAG debugging. It would be useful if such information is available. I am sure many out there who want to be able to do hardware debugging.

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