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NRF24L01+ does not transmit.

Sergy

Hi, Im using a module NRF24L01 + LNA bought off ebay, connected it to msp430 via SPI interface. All spi communications are going solid, I manage to completely configure module. Then I try to send some data over the air:

  • fill in tx queue
  • Write 1 to TX_DS and MAX_RT to clear the flags. (check STATUS gives 0x0E)
  • pulse CE for 10uSec

Then Im expecting to get TX_DS set again, however if I check STATUS register i get 0x0E.

So effectively it means nothing is sent out? (I also dont receive anything on the receiver) Any ideas what could go wrong here?

Thanks, Sergey

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  • 0

    First a comment that is unrelated to your actual problem: Adding an LNA in front of the nRF24L01+ most often will not give you much range improvement, since the LNA will amplify both the signal and noise, most often giving worse SNR. In addition, blocking characteristics will also be much worse using a LNA because out of band noise can saturate the receiver. If you need better range, adding a PA on the transmitting end is therefore a much better solution.

    However, your transmitting sequence seems good. Just to be sure, do you have an nRF24L01+ or nRF24L01? These are two different devices with slightly different feature sets.

    If you connect an oscilloscope to VDD_PA, do you see any transitions? This pin should go high each time a packet is sent.

  • 0 in reply to Ole Morten

    Feel free to post the fact that the CE line wasn't connected as a separate answer, and then accept it as the correct one.

    As for your RX problem, have you checked whether the IRQ pin is asserted? I'd normally recommend using the nRF24L01+ in an interrupt driven way instead of polling registers. As you can see in note c to the register map table, the recommended way of handling received data is to "1) read payload through SPI, 2) clear RX_DR IRQ, 3) read FIFO_STATUS to check if there are more payloads available in RX FIFO, 4) if there are more data in RX FIFO, repeat from step 1)."

    If you still can't find out anything, posting this as a separate question might make more sense, to separate unrelated things.

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  • 0 in reply to Ole Morten

    Feel free to post the fact that the CE line wasn't connected as a separate answer, and then accept it as the correct one.

    As for your RX problem, have you checked whether the IRQ pin is asserted? I'd normally recommend using the nRF24L01+ in an interrupt driven way instead of polling registers. As you can see in note c to the register map table, the recommended way of handling received data is to "1) read payload through SPI, 2) clear RX_DR IRQ, 3) read FIFO_STATUS to check if there are more payloads available in RX FIFO, 4) if there are more data in RX FIFO, repeat from step 1)."

    If you still can't find out anything, posting this as a separate question might make more sense, to separate unrelated things.

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