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nrf_drv_twi dynamically adjust receiving length

Hi,

I am porting a NCI (Nfc Controller Interface) driver to the nRF52. One of the things I am struggling with is that, when reading from the device, the amount of data to be read is part of the first 3 bytes. Is it possible to set up a transfer of 250 bytes and the, after reading the first 3 bytes, downsizing to the right amount of bytes (which is part of these first 3 bytes) without interrupting the transfer?

Thanks and regards, Josef

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  • If the slave has no data available to send it sends nothing resulting in clock extension by the slave until the I2C times out and the master aborts the transaction, so this would not work.

  • Then this is not how normal I2C works, there should be no time-out if you use clock stretching (or there could be some sort of watch-dog but then both sides need to be ready for certain recovery procedure to set I2C to proper initial state = all HIGH and continue with address sending/reception again).

  • The system is using I2C in a completely normal manner, but the question is how to know when 1 or 3 bytes have been read in order to determine from the response whether to continue with the read operation. With the interrupt driven device it is possible, but not when using DMA.

    In this application the slave always responds with 3 bytes of data but can respond with between 3 and 64 bytes, with the length being encoded in the first bytes. Once an I2C transaction has started the slave cannot terminate it in any other way than stretching the clock long enough to cause a timeout which then wastes time in a recovery process and severely limits the throughout, so a solution to allow the master to detect when 3 bytes have been received ( or even 1 byte ) and use that to determine the length of the read transaction is required for efficiency. In the SW (interrupt driven ) case it is trivial, but with the DMA driven architecture currently implemented it appears impossible).

    With the current implementation of the DMA the length of an I2C read transaction must be determined before the read is initiated which is inadequate for this application, hence the request for a way to generate an event after the 3rd byte has been received without terminating the I2C transaction so that SW can interrogate the length and set the actual remaining transaction length before allowing the DMA driven operation to continue.

  • The point of the DMA is that the transfers should be able to operate without CPU interaction. If you need to check the received bytes, you can always use the legacy TWI module that is still available in the nRF52832 and nRF52840 ICs. Which specific device are you interfacing?

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