Hi,
We designed the circuit followed the reference circuit(QFN48), but we always failed in the 8kv ESD test.The CPU always reset while ESD testing.
The 8kv ESD power is appled on a mirco-USB shell, and then the CPU reset. The reset source REG can't indecate any reset reason. And we monitored the 3.3V power but didn't find the power fall.
So are there any reasons that can cause the CPU resetting? Such as power peak, disturbs on IO port......
A short disturb of several KV on power or IO port will cause a protection reset of CPU?
Are there any methods to enhance the ESD level of the chip?