Minimum GPIOTE "low accuracy" pulse width

[Julie H]

I have a device with a programmable output pulse width for its data ready signal. I need to be able to reliable receive the pulse so I don't miss any interrupts, and I'd like to do that in the minimum possible time so I can send the device a "power down" command as quickly as possible.

I'm seeing interrupt latency as high as 60uS while the nRF52840 is "advertising". Is there any sort of maximum guaranteed latency for GPIOTE pins in "low accuracy" mode?

[FormerMember]

Updated answer 16.06.2017: The reason why a longer pusle width is required for GPIOTE PORT events compared with PIN events is the following: When using port events, GPIOTE_IRQHandler in nrf_drv_gpiote.h checks the status of each gpio to figure out which gpio that was trigged when the PORT event occurred.

Since the radio has higher priority than GPIOTE when using the softdevice, software processing of the GPIOTE interrupt is delayed until the radio has finished its operations.

Therefore, since the GPIOTE handler checks the state of each pin for PORT events, the triggered pin has to stay high (or low) until that operation is finished.

If you only need to know that a PORT event occurred it is not necessary to check the status of each gpio.

I would recommend you to modify GPIOTE_IRQHandler so that it fits your application and doesn't check the status of each gpio, just reports that a PORT event occurred.

[FormerMember]

Okay, I see. In low accuracy mode, is the chip in system OFF? If so, the chip will have to wake up. However, 50-60 uS sounds like quite a bit.