SPIM deterministic TX timing control

[kojima]

Hi fellows,

I'm trying to control accurate/deterministic timing of the first bit from MOSI PIN of SPIM, employing EasyDMA.

According to Figure 69 SPI master with EsayDMA, SPIM block has "TXD+1". That would be double buffer for Tx. So, for accurate immediate timing control of MOSI signal, I would like to trigger SPIM to start Tx'ing while the first byte has already been on that double buffer, not under situation where nothing is pre-buffered by EasyDMA, because EasyDMA's bus activity will take addtional cycles.

And additionally, for accurate periodic/pre-scheduled timing control, I'm driving TASKS_START not by CPU but by Timer's EVENTS_COMPARE[i] routed thru PPI.

But, still, some timing jitter is observed on MOSI signal. What indeed is the cause of this timing jitter ? And, any other smart ways to do it accurately on time? Or, SPIM's TASKS_SUSPEND/RESUME can be used alternative to TAKS_STOP/START ?

[kojima]

Hi Turbo J,

I got a small progress.

In my older code, I was setting HFCLK after SoftDevice is enabled. ( I have seen CLOCK->HFCLKSTAT.SRC is unexpectedly flipped) Now, I did set HFCLK far before SoftDevice is enabled. Then, the most of the cause of the jitter disappeared.

But, still timing jitter is observed on MOSI pin. When I connect ide debugger ULINK-Pro (but without Periodic Window update disabled), it works fine. But when I let it run stand-alone, only at the very limited duration, jitter appears. Very strange...