When is hardware reset ignored on the 51822?

[Dan Danknick]

I ran into this last night and curiously, James appears to have posted about it yesterday (devzone.nordicsemi.com/.../trouble-with-system-halted,but-cannot-reset-nrf51822-chip)

Here is my code: it generates a square wave of increasing period on GPIO 0.11 that you can watch on a scope. Presumably, when you short pin 23 (SWDIO/nRESET) to ground, the chip should reboot and this will be evident by the period collapsing back to 10us and increasing again.

int main(void)
{
uint16_t x = 1;

	nrf_gpio_cfg_output(11);

	while(1)
	{
                for(int i=0; i<x; i++)
		    nrf_delay_us(10);
                x++;
		nrf_gpio_pin_toggle(11);
	}
}

However, here is what I see: after I use SWD to download the program via the Segger, I can short SWDIO/nRESET for seconds without resetting the chip. If I power cycle the CPU, everything works as expected.

This is with a G0 step of a 51822-QFAA and I have tried it both ways with respect to PAN 7 (12K pull-down on SWDCLK installed and omitted). I've also isolated the chip from the SWD interface without change.

How can the the J-Flash util leave the core in a state that even a hardware reset doesn't work? I am downloading the code through Keil 4.73, J-Flash 4.72A at 100kHz.

Thanks, Dan

[Mike Robbins]

Hi Dan, after programming with the JLink.exe utility, the chip is left in "Debug Interface Mode" (see "Debugger Interface (DIF)" chapter of nRF51 Series Reference Manual) . It is possible to return the chip to "Normal Mode" by first setting the NRF_POWER->RESET register, and then performing a pin reset via the SWDIO/SWDCLK pins. I have posted a short JLink.exe incantation that does all of this here. Hope that helps!