Unable to properly initiate softdevice, stuck in a loop forever

[Mitch996]

Hello:

I'm trying to get an example program ble_app_hrs running on my custom board, because earlier last month I couldn't write the cccd descriptor properly and I suspect there is something buggy on the board side, and I'm trying to see if official examples will run on my board properly.

So I'm using the nRF5_SDK_13.1.0_7ca7556 example, and the s140_nrf52840_5.0.0-2.alpha softdevice which comes within the 13.1.0_7ca7556 package.

I can manage to get the program run to softdevice_handler_init, shown in the picture below:

and from this point on, I'm stuck in an ls loop forever, here's the code:

#PART 1
0x00009F3E 2800      CMP           r0,#0x00
0x00009F40 D0FA      BEQ           0x00009F38


#PART 2
0x00009F38 4630      MOV           r0,r6
0x00009F3A F008FC57  BL.W       0x000127EC

#PART 3
0x000127EC 4906      LDR           r1,[pc,#24]  ; @0x00012808
0x000127EE 310C      ADDS          r1,r1,#0x0C//after this, r1 will have value of 0x40000418
0x000127F0 680A      LDR           r2,[r1,#0x00]//the value read from 0x40000418, which is LF STATUS register, is 0x00010001
0x000127F2 03D2      LSLS          r2,r2,#15
0x000127F4 D506      BPL           0x00012804
0x000127F6 6809      LDR           r1,[r1,#0x00]
0x000127F8 F0010103  AND           r1,r1,#0x03
0x000127FC 4281      CMP           r1,r0
0x000127FE D101      BNE           0x00012804

#PART 4
0x00012804 2000      MOVS          r0,#0x00
0x00012806 4770      BX            lr //which goes back to 0x00009F3E, the beginning of this loop.

By reading through this loop, I found something problematic:

A. there is no code which could possibly break out of this loop, is this a hardfault handler of some sort? See a more complete #PART 3 here:

0x000127EC 4906      LDR           r1,[pc,#24]  ; @0x00012808
0x000127EE 310C      ADDS          r1,r1,#0x0C
0x000127F0 680A      LDR           r2,[r1,#0x00]
0x000127F2 03D2      LSLS          r2,r2,#15
0x000127F4 D506      BPL           0x00012804
0x000127F6 6809      LDR           r1,[r1,#0x00]
0x000127F8 F0010103  AND           r1,r1,#0x03
0x000127FC 4281      CMP           r1,r0
0x000127FE D101      BNE           0x00012804
0x00012800 2001      MOVS          r0,#0x01
0x00012802 4770      BX            lr
0x00012804 2000      MOVS          r0,#0x00
0x00012806 4770      BX            lr
0x00012808 040C      LSLS          r4,r1,#16
0x0001280A 4000      ANDS          r0,r0,r0
0x0001280C 49C8      LDR           r1,[pc,#800]  ; @0x00012B30
0x0001280E F8110F21  LDRB          r0,[r1,#0x21]!
0x00012812 7849      LDRB          r1,[r1,#0x01]

My assembly-fu isn't high enough so I could be wrong. Anyway the code looks very much like it tries hard to see if the LF clock was properly configured, which brings up problem B.

B.Unable to change the source of LF clock: as you can see from the above assembly code comment, the value of 0x40000418 is 0x00010001, it means 1. the lf clk is running, 2. the source is xtal 36.768, which is really, really weird because I don't have any external lf crystal mounted and I'm positive that I've set the source to RC, in the code below:

This is all very weird, I want to enable the sd, but couldn't, what should I do next?

Best regards!

[RK]

the way out of the loop is whatever code is at 0x12800 which returns 0x01 and then drops out of the loop into whatever code is at 0x9f42

[endnode]

sd_softdevice_enable typically fails when you set wrong LF clock source. Are you testing it on PCA10056 (nRF5840 DK)? It looks not and your NRF_CLOCK_LFCLKSRC definition might be unsupported by S140 alpha version or no in-line with the Engineering sample of nRF52840 you have... what about testing it on Nordic DK first or using synthesized LF clock instead of RC (it's not officially supported by Nordic because they don't validate Soft Device with it but it normally works OK and there is much less to screw up).

[Mitch996]

@RK that would require the clock source to be 00, which is RC.

[Mitch996]

@endnode hello, thank you again Jan, are you a Nordic employee?

Are you telling me that I BETTER have an external LF source on my board, else I'm on my own?

[Mitch996]

@endnode I tried, it stuck at these, waiting for lf clock started event to happen:

0x00009F2E BF20      WFE           
0x00009F30 F8D40104  LDR           r0,[r4,#0x104]//r4=0x40000000
0x00009F34 2800      CMP           r0,#0x00
0x00009F36 D0FA      BEQ           0x00009F2E