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configuring gpio pin stops LFXO and RTC counter

I found that blindly configuring all GPIO pins can stop the LFXO and RTC counter. I am reporting this as: something to be aware of, not obvious to everyone. Not a question, just saying "don't do that, or do it in a different order."

After starting the LFXO clock and enabling RTC counter I did this:

for (uint32_t pin = 0; pin < 32; pin++) {

	// Configure high current output (max 5mA)
	nrf_gpio_cfg(
			pin,
			NRF_GPIO_PIN_DIR_INPUT,
			NRF_GPIO_PIN_INPUT_DISCONNECT,
			NRF_GPIO_PIN_PULLDOWN,
			NRF_GPIO_PIN_H0H1,	// !!! high current
			NRF_GPIO_PIN_NOSENSE);
}

This code changes the pin configurations to have a pulldown and high current, different from their reset condition (but still not connected, same as reset.) Just looking at Figure 1 under GPIO in the product spec, it is not clear to me why this stops the RTC counter. I understand that the physical pin is shared between the LFXO crystal and the GPIO port. I guess that the ANAEN signal is controlled by the LF clock and that somehow configuring the GPIO pin disrupts that.

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