Hi guys
Given that the sample capacitor is 2.5pF max, the quoted source resistances that are supposed to match the settable sample times seem to be extremely conservative. I have only been able to justify them using a 14bit ADC and trying to settle to within 0.0035% of a bit each sample. Trying to settle to within 0.0035% of a bit translates to sample time that is 20 times the source resistance, sample capacitance time constant. Also it I came up with assumed ADC internal series resistances of 0kohm, 50kohm, 60kohm or 100kohm, depending on the particular acquisition time.
Could you tell me how you guys got to the values quoted in the data sheets. If I can get away with faster sample times and higher source resistances then it is of benefit to me.
Thank you.
