GCC generated HEX not working (ble_app_uart)

[VS60]

Hi.

I am on compiling business now. Last days i tried to do GCC compiling and quite go well. But as always on last part i find an error.

My process:

1. Wrote code on keil. Compiled on GCC with MSYS on Windows. (I have hex file now)
2. Edited makefile with path, lib etc. (added spi_master)
3. I turned an ST-Link V2 programmer to J-Link Programmer.
4. Opened NRFGo Studio and programmed the Softdevice to the flash.
5. try to burned application (.hex file) to the flash. It is okey also.

6. Nothing Works.

I think maybe something wrong with linker file and i tried my another code which dont have soft device. I edited linker file ( RAM Length 6000 --> 2000) and program it to the flash. BUM. It has worked very well. But my main program which has softdevice does not work with this linker.

So I think my problem is linker memory areas. i have nrf51822aa version on my chip i think. (Beacon module)

Can somebody help me with RAM area arrangements ? (ble_app_uart examples which i am using)

Linker File

/* Linker script to configure memory regions. */

SEARCH_DIR(.)
GROUP(-lgcc -lc -lnosys)

MEMORY
{
  FLASH (rx) : ORIGIN = 0x1c000, LENGTH = 0x24000
  RAM (rwx) :  ORIGIN = 0x20002800, LENGTH = 0x5800
}

INCLUDE "gcc_nrf51_common.ld"

UPDATE : Correct Adress Map for S130 SDK8.1 Ble_app_uart Example (in Linker File)

MEMORY
{
  FLASH (rx) : ORIGIN = 0x1c000, LENGTH = 0x24000
  RAM (rwx) :  ORIGIN = 0x20002800, LENGTH = 0x1800
}

This is worked for me. Cheers. (Thanks to Sigurd)

[Nicolas Brunner]

Did you check the NRF_LOG output (RTT or UART) ? If the RAM parameters are wrong, a message will be logged with the correct values to use.

[VS60]

Hi.

I compiled with keil and burn the hex code to nrf51822. Then i connect it to the RTT Viewer. This log message come out.

J-Link RTT Viewer V5.12f: Logging started.
LOG:  Global terminal added.
LOG:  Device "NRF51422_XXAA" selected.
LOG:  Found SWD-DP with ID 0x0BB11477
LOG:  Found Cortex-M0 r0p0, Little endian.
LOG:  FPUnit: 4 code (BP) slots and 0 literal slots
LOG:  CoreSight components:
LOG:  ROMTbl 0 @ F0000000
LOG:  ROMTbl 0 [0]: F00FF000, CID: B105100D, PID: 000BB471 ROM Table
LOG:  ROMTbl 1 @ E00FF000
LOG:  ROMTbl 1 [0]: FFF0F000, CID: B105E00D, PID: 000BB008 SCS
LOG:  ROMTbl 1 [1]: FFF02000, CID: B105E00D, PID: 000BB00A DWT
LOG:  ROMTbl 1 [2]: FFF03000, CID: B105E00D, PID: 000BB00B FPB
LOG:  ROMTbl 0 [1]: 00002000, CID: B105900D, PID: 000BB9A3 ???
LOG:  RTT Viewer connected.

I cant see any RAM information. This means it is true ?