• State Not Answered
  • Replies 6 replies
  • Subscribers 62 subscribers
  • Views 4796 views
  • Users 0 members are here
Attachments (0)
Nordic Case Info
  • Case ID: 124588
Options
This post is older than 2 years and might not be relevant anymore
More Info: Consider searching for newer posts

Configuring I2S for ICS43434

Tomer

We are trying to configure the I2S peripheral for working with the ICS-43434 microphone (www.invensense.com/.../), but we are having a hard time fulfill the requirements of the clocks because they conflict with the nRF52832 equations and contraints.

The ICS-43434 has the following requirements: (taken from it's datasheet)

  • format = I2S

  • sample width = 24-bit

  • twos complement

  • There must be 64 SCK cycles in each WS stereo frame

Fulfilling the last line is problematic because the nRF52832 says that the SCK is configured like this:

SCK = 2 * LRCK * CONFIG.SWIDTH

Since sample width = 24:

SCK = 2 * LRCK * 24

So simplified:

SCK = 48 * LRCK

And if I understood correctly, this line: "There must be 64 SCK cycles in each WS stereo frame" means that SCK needs to be 64 times LRCK, so SCK = 64 * LRCK

Any idea how to resolve this conflict?

P.S:

I found two other questions that mentioned that but they were never solved:

devzone.nordicsemi.com/.../

devzone.nordicsemi.com/.../

Parents
  • 0

    Hello All,

    I think there is a work-around of sorts now... Like everyone else, I was attempting to collect audio data from a modern 24-bit I2S MEMS microphone and ran into the hard-coded limitation of 48 SCK pulses per stereo I2S frame in I2S master mode. It dawned on me that there really is precious little difference between I2S master and slave modes... Except where the LRCK and SCK pulses come from.

    My solution was to augment the PWM library to set the PWM carrier period directly in 16MHz ticks, not milliseconds. So I use two PWM channels; one to generate SCK and the other to generate LRCK and connect the PWM outputs to the I2S SCK and LRCK pins. I set the LRCK PWM channel period to be 64X that of the SCK PWM chanel period. I have a functioning peripheral application for SDK 13.0.0 and the pca10040 DK board located here:

    github.com/.../nRF52_24-bit-_I2S_Microphone_Audio_Recording_Utility

    I was using the Invensense ICS43432 microphone. There is a sample ".wav" audio file that demonstrates typical audio quality....

    This may be considered as an ugly work-around but it doesn't require any other external devices to generate the clock signals...

    Best Regards, Greg Tomasch

Reply
  • 0

    Hello All,

    I think there is a work-around of sorts now... Like everyone else, I was attempting to collect audio data from a modern 24-bit I2S MEMS microphone and ran into the hard-coded limitation of 48 SCK pulses per stereo I2S frame in I2S master mode. It dawned on me that there really is precious little difference between I2S master and slave modes... Except where the LRCK and SCK pulses come from.

    My solution was to augment the PWM library to set the PWM carrier period directly in 16MHz ticks, not milliseconds. So I use two PWM channels; one to generate SCK and the other to generate LRCK and connect the PWM outputs to the I2S SCK and LRCK pins. I set the LRCK PWM channel period to be 64X that of the SCK PWM chanel period. I have a functioning peripheral application for SDK 13.0.0 and the pca10040 DK board located here:

    github.com/.../nRF52_24-bit-_I2S_Microphone_Audio_Recording_Utility

    I was using the Invensense ICS43432 microphone. There is a sample ".wav" audio file that demonstrates typical audio quality....

    This may be considered as an ugly work-around but it doesn't require any other external devices to generate the clock signals...

    Best Regards, Greg Tomasch

Children
Related