nRF52832 P0.09/10 GPIOs

[edwardjpalmer]

I have the preprocessor define CONFIG_NFCT_PINS_AS_GPIOS in my code, and GPIO functionality for P0.09 and P0.10 are working just fine for me...

My issue is that even when I configure as output and clear P0.09 as the very first instructions in main(), I am still getting a ~2ms high pulse on P0.09 on processor startup that is causing me problems.

Is there anything I can do at a lower level in software (e.g. in the soft device?) to ensure that P0.09 never goes high on processor startup? I am certain this line is not going high on power-up due to hardware on my board.

[Jørgen Holmefjord]

Is this on a custom board or the nRF52-DK? I'm not able to reproduce the issue on the nRF52-DK. Do you see this with any firmware\example from our SDK, or just your project?

[edwardjpalmer]

This is on a custom board.  P0.09 is wired directly (i.e. no pullup/down) to the enable line of a load switch, TPS27081.  This switch gates power to a cellular modem.  Because of the ~2ms high pulse experienced on P0.09 at nRF52832 reset, the modem also tries to power up and the high instantaneous current demand causes a regulator to droop, causing the processor to reset, and this continues endlessly.

P0.10 is wired to UART_CTS of the cellular modem.  This isn't powered when the 2ms pulse on P0.09 occurs (since P0.09 being low before the pulse = modem off).

Our solution in this case was to change a capacitor value to considerably increase the turn-on time of the load switch (to beyond 10ms) thus "ignoring" the 2ms enable pulse.

But the cause of the pulse on P0.09 is still a mystery...

[Jørgen Holmefjord]

Unfortunately, the GPIO behavior during reset is undefined and cannot be guaranteed. Is this happening when VDD is very low?