Boot sequence for nRF52832

[cswanson420]

Where in the official documentation can I find what the boot order/proedure is for the nRF52832?

For instance: This post gives a coarse overview which is great but I am seeking the ability to match the instructions presented in Ozone with a flow diagram or description in documentation.

I am interested in how the bootloader is invoked - or not invoked - and how the boot events occur if the softdevice, bootloader, or none of these are present. There are bits and pieces strewn like tribal anecdotes throughout the forum, so I am hoping the description is really in front of my face and I am too thick to have recognized it.

[Hung Bui]

Hi cswanson,

Beside the post, you can also have a look at the softdevice specification page here to know about the reset behavior.

The MBR is distributed as part of the softdevice. But it's not updated when you update a softdevice.

Note that our current bootloader only works with the softdevice flashed on the chip, even if you don't use OTA DFU.

The MBR will check the UICR to see if the bootloader is installed (and where the bootloader is) before it device to forward interrupts to the bootloader or to the Softdevice.

[cswanson420]

I did find the specification you refer, but I found it somewhat obscure because of the references to the Vector Table and commands such as SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET. I did some digging for the vector table but was unable to find anything definitive.

Is there a way to look at the source code that is following the execution sequence in the reset procedure?

I would find it instrumental to be able to step through the reset process with Ozone.

Also, is the file ./toolchain/gcc/gcc_startup_nrf52.s related?