nRF52 DK segger (PCA10036) not giving option to lock the application code

[Rahul Sahu]

I am using nRF51822 (PTR5518A) with SDK v12 and s130 softdevice. To dump the code I am using nRF52 DK segger (PCA10036). With that I am able to dump the code but there is no option to lock it. I don't have any other segger board to dump the code. Is there any way to enable code locking facility in nRF52 DK segger board ? Or can I enable it through code?

[endnode]

This looks like misunderstanding. Every nRF5x chip you can "lock" against read-back and debugger access. This is what most of the people do once they are done with development and go to production. The only way to bypass it is either hack it (there unfortunately is vulnerability on nRF51 which allows some tricks) or erase the chip completely which will "unlock" it.

Then you say you have PCA10036 but you don't have other SEGGER board. Why would you need it? "Lock" in nrfjprog or nRFgo Studio is of course linked to the nRF5x target chip not to SEGGER J-Link OB fw (that is kind of locked by itself, you can only bootload it and update with other FW image from SEGGER or Nordic...)

[Rahul Sahu]

PCA10036 is on the nRF52 Development board. Using that I am trying to dump the code in my custom board which is having nrf51822 (PTR5518A). Not using any separate segger board for that. With the PCA10036 there is no problem in dumping the code. But the checkbox provided where we can enable or disable the lock is by default disabled and there is no way I can change it.

[endnode]

I'm afraid you really misunderstood Nordic dev kit:

• PCA10036 IS the name of Nordic nRF52 Preview Dev Kit.
• On the Dev Kit there are two main MCUs: on is Atmel chip with white sticker which contains SEGGER J-Link OB FW. The fact that sticker says "PCA10036" doesn't mean it's the name of the chip but that's code name of the whole PCB.
• Second MCU is actual nRF52 target.
• Now SEGGER J-Link OB can target one of 3 possible targets for JTAG/SWD debugging and programming: firstly it checks if there is any valid target on ports P19 or P20 and only if nothing is detected it tries internal target on the board. I suppose you connect your custom board to one of these P19/20 headers.
• Side note: PCA10036 contains only pre-production variant of nRF52 target so it shouldn't be used for development. However it can be used as SEGGER J-Link OB for external Nordic chips without problems.

[endnode]

(2/2)

• Now you talk about some "check box" but where is it? I suppose some SW. Can you be more precise about where it is, what is says, maybe add some screenshot? Why you assume it has anything to do with SEGGER J-Link FW/chip on PCA10036? This one means if after all SWD programming the SW should also lock target through specific UICR register (they have different name on nRF51 and nRF52 but purpose is the same: enable read-back protection and disable SWD debugger.

[endnode]

If you want to "lock" nRF5x chip then it's easy and you have many options:

• You can write into UICR register from within the FW itself (but you need to write this functionality before you compile and load the FW of course;).
• You can write to UICR over SWD by simple memory access (there is logical address in Reference Manual/Product Specification of each chip).
• You can use specific command of nrfjprog tool which will write into UICR for you (you don't need to look-up addresses and register mapping, tool has it built-in based on chip type/family).
• You can lock the chip when programming through nRFgo Studio (Windows tool with GUI). Same principle as previous case, just a checkbox not a command;)
• Probably other tools and ways possible...