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question regarding NRF_TIMER(0,1,2) clock source-nrf51822

Dear Nordic guy, I 'm developing LG product with nrf51822 chip. I have some question.

  1. Applcation SW timer use the rtc1 clock source.so, When NRF_timer interrupt expired during rtc1 SW timer handler code is executing, Does NRF_timer interrupt handler is executed immediately? Or Does NRF_timer interrupt handler is executed after finishing rtc1 SW timer handler code execution?
  2. As I know,NRF_timer use the 16Mhz main clock. How much current consumption is happened when we use this timer?
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  • The current consumption (or the dependencies of each peripheral) can be found in the PS chapter 8. For the timer running in systemon mode, it will be HFCLK+TIMER current, which is (470 + 30) uA.

    There are four interrupt priorities in the nRF51x22, from 0 to 3 (0 is highest), which are available for the developer. If you are using any of the Softdevices, please note that it claims priority 0 and 2, leaving 1 and 3 open for the application.

    An "interrupt X" can interrupt an ongoing "interrupt Y" (sorry for the bad sentence) only if "interrupt X" is of higher priority than "interrupt Y". If they are equal or "interrupt Y" is of higher priority, the interrupt will be nested and executed when the previous is finished.

    This then depends on how you have setup the NVIC interrupt priority.

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  • The current consumption (or the dependencies of each peripheral) can be found in the PS chapter 8. For the timer running in systemon mode, it will be HFCLK+TIMER current, which is (470 + 30) uA.

    There are four interrupt priorities in the nRF51x22, from 0 to 3 (0 is highest), which are available for the developer. If you are using any of the Softdevices, please note that it claims priority 0 and 2, leaving 1 and 3 open for the application.

    An "interrupt X" can interrupt an ongoing "interrupt Y" (sorry for the bad sentence) only if "interrupt X" is of higher priority than "interrupt Y". If they are equal or "interrupt Y" is of higher priority, the interrupt will be nested and executed when the previous is finished.

    This then depends on how you have setup the NVIC interrupt priority.

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