nRF52810 Open Drain GPIO

Question

In the recent past, I used a SoC in which GPIOs could be configured as "open drain", that is in which there is an internal transistor where the SOURCE is grounded, the DRAIN is left open (the exposed GPIO pin) and the GATE can be controlled internally. 
 In that configuration, I connected a sensor VCC to the battery and sensor GND to the open-drain GPIO. Then, I could switch the GPIO status programmatically between "disconnected" and low (grounded) and so power on and off the sensor without adding an external transistor. 
 I can't find an explicit "open drain" configuration for nRF52810 GPIOs, is there a way to do this?

Jørn · Accepted Answer

Hello Gilsaccio 
 The closest you get is by configuring the pin to disconnect on logic high, and either be standard or high drive for logic low. This will give the same behavior. In this case, when you set the output level to 1, the pin will go high-Z. When you configure the output to be logic low, the pin will go low and sink current. You can see this explained in this post . However there is a limitation as to how much current you can sink this way, and how high the voltage applied to the pins can be. You can find the absolute maximum rating section here and the electrical specifications for the GPIO here . 
 Depending on how the sensor behaves when current stops running, the pin voltage, when high-Z, may float up to VCC. Be sure then that does not surpass the absolute maximum rating. 
 Best regards 
 J&oslash;rn Fr&oslash;ysa

nRF52810 Open Drain GPIO

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