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Accurate Time Capture

Hi guys, I'm using a HFCLK TIMER to time ADC sample capturing via PPI. This eliminates CPU+BLE usage from affecting my time keeping. I assume that each ADC sample arrives in my callback within usec variance from my timing.

I'm trying to get 10msec timing resolution for my time-stamping on the ADC samples. When a sample hits the callback I increment my timestamp by 10msec. This data is then transmitted to a Central.

Over time I see two capture devices have their samples drift seconds apart, when comparing the data received on the Central side. They both are measuring the same source, but the timing is as much as 4-5seconds difference after 90seconds of overall duration. The HFCLK should be highly accurate and since I'm using PPI, BLE activity can't explain these timing drifts. Any ideas what could cause timing drifts like this?

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  • Higher accuracy isn't necessarily true, depends on your xtal choices. Many of the specified 32MHz xtals are 10-20ppm same as the RTC. Plus higher accuracy RTC crystals are normally cheaper compared to 32MHz xtals. But if you don't care about the power consumption of the HF CLK then by all means do it that way.

    Yes the sample sitting in the SAADC buffer assuming it is running single shot mode is the last sample you wanted.

    You should double check that it is running single shot, single sample in buffer (not averaging) and that you actually turned on HF_CLK. The SD will always turn off HF_CLK during power manage and when it returns from power mange it is actually on HF_RC. Just search in the devzone on how to make sure it is on continuously. As I recall the trick is to start it before starting the SD and the SD will leave it on.

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  • Higher accuracy isn't necessarily true, depends on your xtal choices. Many of the specified 32MHz xtals are 10-20ppm same as the RTC. Plus higher accuracy RTC crystals are normally cheaper compared to 32MHz xtals. But if you don't care about the power consumption of the HF CLK then by all means do it that way.

    Yes the sample sitting in the SAADC buffer assuming it is running single shot mode is the last sample you wanted.

    You should double check that it is running single shot, single sample in buffer (not averaging) and that you actually turned on HF_CLK. The SD will always turn off HF_CLK during power manage and when it returns from power mange it is actually on HF_RC. Just search in the devzone on how to make sure it is on continuously. As I recall the trick is to start it before starting the SD and the SD will leave it on.

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