Hi guys, I'm using a HFCLK TIMER to time ADC sample capturing via PPI. This eliminates CPU+BLE usage from affecting my time keeping. I assume that each ADC sample arrives in my callback within usec variance from my timing.
I'm trying to get 10msec timing resolution for my time-stamping on the ADC samples. When a sample hits the callback I increment my timestamp by 10msec. This data is then transmitted to a Central.
Over time I see two capture devices have their samples drift seconds apart, when comparing the data received on the Central side. They both are measuring the same source, but the timing is as much as 4-5seconds difference after 90seconds of overall duration. The HFCLK should be highly accurate and since I'm using PPI, BLE activity can't explain these timing drifts. Any ideas what could cause timing drifts like this?
