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nRF240L01 with STM8L051F3

Hi, I am looking for procedure to make it work nRF240L01? I am getting documents for Arduino but as you know that is not understandable, with Arduino it worked but i don't understood. Now i want to make it work with STM8L051F3. STM8L051F3 is 8 bit ultra low power controller. I am looking for procedure like what steps i have to follow so i can send data to another nRF240L01. Which commands i have to send. I want to transmit data after every 1 sec and then it will go in power down. Receiver will be always in receiver mode.

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  • Thank yo very much for your reply

    I will do exactly as the example you sent an inform results in about 2 days

    I have well tested the SPI comunications , working OK

    ---------------------------------------------------------------

    Level compatibility with 5VuP VCC.

     I have measured  CE  CSN  MOSI  and they are OK about input levels for uP   Vcc = 5V)

    MISO output with 4K7  resistor to +5V  also has complete 0 an 5V range.

    For  IRQ  similar resistor to +5V has no effect. I didn't find this information in data sheet

    If uP has some problem with 3.3V as high level, I can reduce the Vcc supply to about 4V or add a small mosfet transistor as inverter (modifying as needed IRQ polarity definition)

    Regards, Osvaldo

  • Hi Osvaldo

    Sorry for the slow response, I was out in Easter vacation until today. 

    Are you still having issues with this? 

    The nRF24L01+ will only work in the 1.9-3.6V range, and it is important that you keep the supply and the interface signals within this range. 

    If you are unable to use an MCU that supports this level you will need some kind of level shifters on the signals, and a separate regulator for the nRF device to provide the supply voltage. 

    Best regards
    Torbjørn

  • I was working on other matters for a week and now comeback with NRF24L01+

    Thank you for your suggestions. In one case I can use a processor with 3,6V so no level problem

    In other case, with 5V supply, MOSI, CLK, CE, CSN are input with no clipping and tolerating 5V

    MISO seems to be open drain and with 4K7 resistor to+5V is OK for procesor SPI data input.

    A similar resistor at IRQ has not any usefull level correction, but I wil place an small mosfet (2N7002)

    and 4k7 drain to +5V resistor as inverter.  Procesor interrupt input to be set as active for low to high transition

    I am writing a new assembler following your mentioned steps. 

    After a carefull revision of soft and hardware,  I will test and inform you about it

    Regards, Osvaldo

  • Hi Osvaldo

    o.hojvat said:
    In other case, with 5V supply, MOSI, CLK, CE, CSN are input with no clipping and tolerating 5V

    You mean the nRF24L01+ appears to work fine even if you apply 5V on the signal lines? 

    I would strongly discourage this if you are planning to go to production with this project. Using the part outside the specified operating range means you could have unpredictable issues down the line, and there is a higher risk that devices will stop working in the field even if they might work on your desk. 

    o.hojvat said:
    After a carefull revision of soft and hardware,  I will test and inform you about it

    Sounds like a plan. Good luck Slight smile

    Best regards
    Torbjørn

  • -- PTX -- 1) Set the PWR_UP bit in the CONFIG register 2) Set DYNPD to 0x3F 3) Set the EN_DPL bit in the FEATURE register 4) Upload a payload 5) Pulse CE for 10 us 6) Add a delay (1ms+) and repeat from 4) --PRX-- 1) Set the PWR_UP and PRIM_RX bits in the CONFIG register 2) Set DYNPD = 0x3F 3) Set the EN_DPL bit in the FEATURE register 4) Set CE high 5) Wait for the IRQ line to go low 6) Read out the RX payload 7) Repeat from 5)

    Dear Torbjørn,

    I just found this while seeking an answer to my own problem. I am programming  in C using an NXP FRDM-K64F dev kit which provides a handy socket just made for common modules using your chip.I have succeeded in getting TX to work and can see my packets going out on a sniffer, but never can get an RX packet to pull IRQ.  I just went through your notes and am doing exactly the same, except I am not setting up DPL. Should it still work or is DPL mandatory? 

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  • -- PTX -- 1) Set the PWR_UP bit in the CONFIG register 2) Set DYNPD to 0x3F 3) Set the EN_DPL bit in the FEATURE register 4) Upload a payload 5) Pulse CE for 10 us 6) Add a delay (1ms+) and repeat from 4) --PRX-- 1) Set the PWR_UP and PRIM_RX bits in the CONFIG register 2) Set DYNPD = 0x3F 3) Set the EN_DPL bit in the FEATURE register 4) Set CE high 5) Wait for the IRQ line to go low 6) Read out the RX payload 7) Repeat from 5)

    Dear Torbjørn,

    I just found this while seeking an answer to my own problem. I am programming  in C using an NXP FRDM-K64F dev kit which provides a handy socket just made for common modules using your chip.I have succeeded in getting TX to work and can see my packets going out on a sniffer, but never can get an RX packet to pull IRQ.  I just went through your notes and am doing exactly the same, except I am not setting up DPL. Should it still work or is DPL mandatory? 

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