How to enable P0.09 and P0.10 as GPIO pins on the nRF52 instead of NFC pins?

[singh]

Hi,

I'm using nrf52 custom board designed for our project,For this we have P0.09 and P0.10 as rx and tx used for uart, when i configured this two pins as rx and tx it is not showing any data on the uart.I have read the datasheet and i have seen this link devzone.nordicsemi.com/.../
but i'm not able to resolve the problem ,please help me ASAP.

Regards,

Prudhvi.

[bjorn-spockeli]

You simply need to define CONFIG_NFCT_PINS_AS_GPIOS in the preprocessor symbols in the ble_app examples that does not use the NFC antenna to use the pins as GPIOs.

It is also possible to write directly to the NFCPINS UICR register in order to use the pins as GPIO pins, i.e. add the following line to your code.

const uint32_t UICR_ADDR_0x20C    __attribute__((at(0x1000120C))) __attribute__((used)) = 0xFFFFFFFE

You will also need to follow some steps described in the comments below.

-Bjørn

[bjorn-spockeli]

I think you will have to define a section in the linker script, e.g. .uicrNfcPinsAddress, i.e.

 /** Location in UICR of NFC Pins register is stored. */ UICR_NFCPINS(r) : ORIGIN = 0x1000120C, LENGTH = 0x04 

SECTIONS { 
    /* Write the bootloader address in UICR. */ 
    .uicrNfcPinsAddress : 
    { 
         KEEP(*(.uicrNfcPinsAddress)) 
     } > UICR_NFCPINS
 } 

Then in the application code

const uint32_t UICR_ADDR_0x20C __attribute__ ((section(".uicrNfcPinsAddress"))) __attribute__((used));

[Thomas Y]

 I also needed to add the -DCONFIG_NFCT_PINS_AS_GPIOS CFLAG inside the bootloader Makefile as well

In my case I was using P009 as a CS for SPI and I could not get it to work from the APP but the interesting part is that when using JLINK on my board including a 3.3 V and GND pin it would reset the board powered through USB on my laptop it was working. Connection to Jlink RTT viewer reported correct reading on MISO after driving CS PIN 0.09 porperly. But then after a power off the pin didn't work anymore again for CS PIN 0.09. Is there a sequence diagram explaining what JLINK does in the NRF52 when driving the reset PIN. I am still scratching my head around this and why I can't see the register being persisted