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PWM individual decoder not working

Hi all,

I have two pwm pins I would like to have them run at two different duty cycles. My understanding is that we can do this by setting the decoder to individual. When I set this register to individual my output flat lines. Although, When I set it to grouped both of my PWM pins output a pwm at 60hz 50% duty cycle as expected.

Below is my code.

uint16_t pwm_doody[2]={0x250, 0x421};

NRF_PWM0->PSEL.OUT[0] = (PWM_PINA << PWM_PSEL_OUT_PIN_Pos)|(PWM_PSEL_OUT_CONNECT_Connected << PWM_PSEL_OUT_CONNECT_Pos);

NRF_PWM0->PSEL.OUT[1] = (PWM_PINB << PWM_PSEL_OUT_PIN_Pos)|(PWM_PSEL_OUT_CONNECT_Connected << PWM_PSEL_OUT_CONNECT_Pos);

NRF_PWM0->ENABLE = (PWM_ENABLE_ENABLE_Enabled << PWM_ENABLE_ENABLE_Pos); NRF_PWM0->MODE = (PWM_MODE_UPDOWN_Up);

NRF_PWM0->PRESCALER = (PWM_PRESCALER_PRESCALER_DIV_128);

NRF_PWM0->COUNTERTOP = (0x823);

NRF_PWM0->LOOP = (PWM_LOOP_CNT_Disabled);

NRF_PWM0->DECODER = (PWM_DECODER_LOAD_Individual << PWM_DECODER_LOAD_Pos)|(PWM_DECODER_MODE_RefreshCount << PWM_DECODER_MODE_Pos);

NRF_PWM0->SEQ[0].PTR = ((uint32_t)(pwm_doody) << PWM_SEQ_PTR_PTR_Pos);

NRF_PWM0->SEQ[0].CNT = ((sizeof(pwm_doody) / sizeof(uint16_t)) << PWM_SEQ_CNT_CNT_Pos);

NRF_PWM0->SEQ[0].REFRESH = 0;

NRF_PWM0->SEQ[0].ENDDELAY = 0;

NRF_PWM0->TASKS_SEQSTART[0] = 1;

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  • Hi,

    For PWM_DECODER_LOAD_Individual, the pwm_sequence table need to be a length of 4.

    Change

    uint16_t pwm_doody[2]={0x250, 0x421};
    

    to

    uint16_t pwm_doody[4]={0x250, 0x421,0,0};
    
  • See figure Figure 4. Decoder memory access modes in the documentation. Also from the documentation we have the following:

    After the SEQ[n].PTR is set to the desired RAM location, the SEQ[n].CNT register must be set to the number of 16-bit half words in the sequence. It is important to observe that the Grouped and Single modes require one half word per group or one half word per channel respectively, and thus increases RAM size occupation.

    Single mode is here the same as Individual mode. I.e. you need one half word for each of the 4 channels, even if you are only using e.g 2 channels. The documentation could have stated this in a more clear way.

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  • See figure Figure 4. Decoder memory access modes in the documentation. Also from the documentation we have the following:

    After the SEQ[n].PTR is set to the desired RAM location, the SEQ[n].CNT register must be set to the number of 16-bit half words in the sequence. It is important to observe that the Grouped and Single modes require one half word per group or one half word per channel respectively, and thus increases RAM size occupation.

    Single mode is here the same as Individual mode. I.e. you need one half word for each of the 4 channels, even if you are only using e.g 2 channels. The documentation could have stated this in a more clear way.

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