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Problem with nrf52832 xxab.

Parents
  • Have a look at the 

    #define NRF_SDH_CLOCK_LF_SRC 1
    in your sdk config file

  • Hello,

    Thank you for your responce, I tried to do it and got an error, but fuction out. I will write the code in 10 minutes

    Tried to change 1 to 2:

    // <0=> NRF_CLOCK_LF_SRC_RC // <1=> NRF_CLOCK_LF_SRC_XTAL // <2=> NRF_CLOCK_LF_SRC_SYNTH

    #ifndef NRF_SDH_CLOCK_LF_SRC

    #define NRF_SDH_CLOCK_LF_SRC 2

    #endif

    The same, but I put in linker file:

    /*###ICF### Section handled by ICF editor, don't touch! ****/
    /*-Editor annotation file-*/
    /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
    /*-Specials-*/
    define symbol __ICFEDIT_intvec_start__ = 0x0000;
    /*-Memory Regions-*/
    define symbol __ICFEDIT_region_ROM_start__ = 0x00000;
    define symbol __ICFEDIT_region_ROM_end__ = 0x0003FFFF;
    define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
    define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
    export symbol __ICFEDIT_region_RAM_start__;
    export symbol __ICFEDIT_region_RAM_end__;
    /*-Sizes-*/
    define symbol __ICFEDIT_size_cstack__ = 0x900;
    define symbol __ICFEDIT_size_heap__ = 0x800;
    /**** End of ICF editor section. ###ICF###*/

    define memory mem with size = 4G;
    define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
    define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];

    define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
    define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };

    initialize by copy { readwrite };
    do not initialize { section .noinit };

    keep { section .intvec };
    place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
    place in ROM_region { readonly };
    place in RAM_region { readwrite,
    block CSTACK,
    block HEAP };

Reply
  • Hello,

    Thank you for your responce, I tried to do it and got an error, but fuction out. I will write the code in 10 minutes

    Tried to change 1 to 2:

    // <0=> NRF_CLOCK_LF_SRC_RC // <1=> NRF_CLOCK_LF_SRC_XTAL // <2=> NRF_CLOCK_LF_SRC_SYNTH

    #ifndef NRF_SDH_CLOCK_LF_SRC

    #define NRF_SDH_CLOCK_LF_SRC 2

    #endif

    The same, but I put in linker file:

    /*###ICF### Section handled by ICF editor, don't touch! ****/
    /*-Editor annotation file-*/
    /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
    /*-Specials-*/
    define symbol __ICFEDIT_intvec_start__ = 0x0000;
    /*-Memory Regions-*/
    define symbol __ICFEDIT_region_ROM_start__ = 0x00000;
    define symbol __ICFEDIT_region_ROM_end__ = 0x0003FFFF;
    define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
    define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
    export symbol __ICFEDIT_region_RAM_start__;
    export symbol __ICFEDIT_region_RAM_end__;
    /*-Sizes-*/
    define symbol __ICFEDIT_size_cstack__ = 0x900;
    define symbol __ICFEDIT_size_heap__ = 0x800;
    /**** End of ICF editor section. ###ICF###*/

    define memory mem with size = 4G;
    define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
    define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];

    define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
    define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };

    initialize by copy { readwrite };
    do not initialize { section .noinit };

    keep { section .intvec };
    place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
    place in ROM_region { readonly };
    place in RAM_region { readwrite,
    block CSTACK,
    block HEAP };

Children
  • I think you want to change it to 0 (not 2) for RC ?

  • Yes, if your new chip has less flash and ram, you will definitely have to update the linker file. Should be reasonably straightforward to work out the new sizes.

    I would look at the example project linker files to work out the start and size of the flash and ram, then update those for the smaller capacity chip.

  • The RAM and ROM in Linker were changed to 256k ROM and 32 kRAM.(in the Linker code which I sent - it's changed)

    I  tested with #define NRF_SDH_CLOCK_LF_SRC 0 too, the same(, but I see in asm code, it stucked in handler:
    SVC_Handler

    For example for xxaa was Linker file:

    /*###ICF### Section handled by ICF editor, don't touch! ****/
    /*-Editor annotation file-*/
    /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
    /*-Specials-*/
    define symbol __ICFEDIT_intvec_start__ = 0x23000;
    /*-Memory Regions-*/
    define symbol __ICFEDIT_region_ROM_start__ = 0x23000;
    define symbol __ICFEDIT_region_ROM_end__ = 0x7ffff;
    define symbol __ICFEDIT_region_RAM_start__ = 0x20001720;
    define symbol __ICFEDIT_region_RAM_end__ = 0x2000ffff;
    export symbol __ICFEDIT_region_RAM_start__;
    export symbol __ICFEDIT_region_RAM_end__;
    /*-Sizes-*/
    define symbol __ICFEDIT_size_cstack__ = 0x800;
    define symbol __ICFEDIT_size_heap__ = 0x200;
    /**** End of ICF editor section. ###ICF###*/

    define memory mem with size = 4G;
    define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
    define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];

    define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
    define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };

    initialize by copy { readwrite };
    do not initialize { section .noinit };

    keep { section .intvec };
    place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
    place in ROM_region { readonly };
    place in RAM_region { readwrite,
    block CSTACK,
    block HEAP };

    But when I change the addresses from:

     define symbol __ICFEDIT_region_ROM_end__ = 0x7ffff;->define symbol __ICFEDIT_region_ROM_end__ = 0x3ffff;

    and

    define symbol __ICFEDIT_region_RAM_end__ = 0x2000ffff;->define symbol __ICFEDIT_region_RAM_end__ = 0x20007fff;

    It doesn't start.

  • In your first linker file, it doesn't seem reasonable that the ROM would start @ 0x00000, What is currently your start address and length for RAM and ROM ? Are you using a Soft Device ? What error is the linker giving you ?

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