Clock in an Unstructured Serial Bit Stream

Question

Hi 
 I need to capture a serial bit stream which consists of a sequence of 16 bit words, package them up and transmit over a bluetooth interface - it's a datalogger application. The bit stream has no framing structure and is simply a data line and clock line - so I need something like a simple shift register with an interrupt when i get 16 bits (or 8, or 32 or 64 bits). The nRF52 devices have UART, SPI and i2c interfaces which are serial but can't see a way to make them work in a basic/raw mode where they don't try to impose some structure to the data - but maybe this is possible. Can anyone give me some pointers on this. 
 Cheers

ovrebekk · Answer

Hi 
 I assume this is a continuous data stream, without any breaks in the communication? 
 I agree that the speed is way too high for GPIO interrupts, so a method using one of the existing peripheral interfaces is your best bet. 
 Because the communication is clocked I am thinking the SPIS module would work best, you just need some way to generate the chip select signal since none is provided from your data stream. The TIMER modules in the nRF52 device can be set in a counter mode, and by using the PPI and GPIOTE modules you can have the TIMER count up every time a new bit is clocked in on your clock line. Then you can set a CC (compare/capture) register in the TIMER to fire every time you reach the number of bits that you want to read (this needs to be divisible by 8, so either 8, 16, 32 or 64 will work fine), and use the PPI and GPIOTE again to toggle a pin when the event occurs, providing a chip select signal for the SPIS module. 
 The compare event can also fire off an interrupt, so that the application gets informed that more data is available. 
 Since the stream is continuous you need to start the next transaction immediately after the current one ends, and to do this reliably you might have to use two different SPIS modules. When one is disabled the other one is running, giving you more time to update the buffers in between. 
 In this case you can configure two different CC registers, after 64 and 128 bits for instance, and have them disable and enable the two SPIS modules respectively. The TIMER can be configured to clear automatically on the second CC register, having the process run in a loop. 
 The short answer then is that this should work, but it is not trivial to do if you don't have existing experience with the peripherals and the task/event system in the nRF52 series ;) 
 Best regards Torbjørn