nRF51422 SPI issue - Checking for MISO state outside of the SPI library

[mnhs]

Hi,

I am developing a multi-protocol communication device using BLE, ANT and 868Mhz "long-range" communication. I am using MRF49XA chip for sub-ghz communication. I have all libraries already done and working for STM32 microcontrollers and I am just porting them to nRF51422 (with S310 stack). One of the characteristics of the MRF49XA is that during packet transmission, the uC needs to wait until the SDI (MISO) line is put high by the MRF49XA until it sends the next byte (then the MISO is low until the radio transmits the byte). No clock cycles nor SS pin transition can be done during this wait. How to implement this on nRF51 the cleaniest and most reliable way? Can I read the logic state of MISO directly without severing the SPI communication?

Thank you in advance, Best Regards, Marek Novak.

[Tim]

You can read the pins. I'm not sure if you can interrupt on them but I expect you can. If not you can temporarily disable the SPI system and then re-enable it when you need to send/receive more data.

[mnhs]

Thank you very much, reading it is satisfactory for my application, no need for interrupt