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FDS not working after SD initialize

HI, I have nrf52832 and I am using latest SDK 14.2.0. 

I am using FDS and the problem is that before setting up BLE fds_record_write works fine but after setting up BLE all data using fds_record_write goes to dirty records. My ble part is just simple central what scanns advertisements and creates connectioin. Here is my main code.


ret_code_t ret;

ret = NRF_LOG_INIT(NULL);
APP_ERROR_CHECK(ret);

NRF_LOG_DEFAULT_BACKENDS_INIT();

ret = app_timer_init();
APP_ERROR_CHECK(ret);

NRF_LOG_INFO("RUN\r\n");

//INIT FLASH
fds_register(fds_evt_handler);

NRF_LOG_INFO("Initializing fds...");

ret = fds_init();
APP_ERROR_CHECK(ret);

wait_for_fds_ready();

fds_stat_t stat = {0};

ret = fds_stat(&stat);
APP_ERROR_CHECK(ret);

NRF_LOG_INFO("Found %d valid records.", stat.valid_records);
NRF_LOG_INFO("Found %d dirty records (ready to be garbage collected).", stat.dirty_records);

fds_gc();

//When I call here fds_record_write it works fine

ble_init();

//When I call here fds_record_write it goes to dirty records

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  • Do you check all the returns from the FDS functions?

    Attached is an example using the FDS from the ble_app_uart example. Check the UART log to see if it works. At least from here, I can start the FDS module after ble_stack_init();

     

    ble_app_uart_FDS.zip

     

    Best regards,

    Edvin

  • Hi, I tested it with one of my custom boards what don't have second crystal and it does not run. 

    I use this config

    // </h>
    //==========================================================

    // <h> Clock - SoftDevice clock configuration

    //==========================================================
    // <o> NRF_SDH_CLOCK_LF_SRC - SoftDevice clock source.

    // <0=> NRF_CLOCK_LF_SRC_RC
    // <1=> NRF_CLOCK_LF_SRC_XTAL
    // <2=> NRF_CLOCK_LF_SRC_SYNTH

    #ifndef NRF_SDH_CLOCK_LF_SRC
    #define NRF_SDH_CLOCK_LF_SRC 0
    #endif

    // <o> NRF_SDH_CLOCK_LF_RC_CTIV - SoftDevice calibration timer interval.
    #ifndef NRF_SDH_CLOCK_LF_RC_CTIV
    #define NRF_SDH_CLOCK_LF_RC_CTIV 16
    #endif

    // <o> NRF_SDH_CLOCK_LF_RC_TEMP_CTIV - SoftDevice calibration timer interval under constant temperature.
    // <i> How often (in number of calibration intervals) the RC oscillator shall be calibrated
    // <i> if the temperature has not changed.

    #ifndef NRF_SDH_CLOCK_LF_RC_TEMP_CTIV
    #define NRF_SDH_CLOCK_LF_RC_TEMP_CTIV 2
    #endif

    // <o> NRF_SDH_CLOCK_LF_XTAL_ACCURACY - External crystal clock accuracy used in the LL to compute timing windows.

    // <0=> NRF_CLOCK_LF_XTAL_ACCURACY_250_PPM
    // <1=> NRF_CLOCK_LF_XTAL_ACCURACY_500_PPM
    // <2=> NRF_CLOCK_LF_XTAL_ACCURACY_150_PPM
    // <3=> NRF_CLOCK_LF_XTAL_ACCURACY_100_PPM
    // <4=> NRF_CLOCK_LF_XTAL_ACCURACY_75_PPM
    // <5=> NRF_CLOCK_LF_XTAL_ACCURACY_50_PPM
    // <6=> NRF_CLOCK_LF_XTAL_ACCURACY_30_PPM
    // <7=> NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM

    #ifndef NRF_SDH_CLOCK_LF_XTAL_ACCURACY
    #define NRF_SDH_CLOCK_LF_XTAL_ACCURACY 0
    #endif
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  • Hi, I tested it with one of my custom boards what don't have second crystal and it does not run. 

    I use this config

    // </h>
    //==========================================================

    // <h> Clock - SoftDevice clock configuration

    //==========================================================
    // <o> NRF_SDH_CLOCK_LF_SRC - SoftDevice clock source.

    // <0=> NRF_CLOCK_LF_SRC_RC
    // <1=> NRF_CLOCK_LF_SRC_XTAL
    // <2=> NRF_CLOCK_LF_SRC_SYNTH

    #ifndef NRF_SDH_CLOCK_LF_SRC
    #define NRF_SDH_CLOCK_LF_SRC 0
    #endif

    // <o> NRF_SDH_CLOCK_LF_RC_CTIV - SoftDevice calibration timer interval.
    #ifndef NRF_SDH_CLOCK_LF_RC_CTIV
    #define NRF_SDH_CLOCK_LF_RC_CTIV 16
    #endif

    // <o> NRF_SDH_CLOCK_LF_RC_TEMP_CTIV - SoftDevice calibration timer interval under constant temperature.
    // <i> How often (in number of calibration intervals) the RC oscillator shall be calibrated
    // <i> if the temperature has not changed.

    #ifndef NRF_SDH_CLOCK_LF_RC_TEMP_CTIV
    #define NRF_SDH_CLOCK_LF_RC_TEMP_CTIV 2
    #endif

    // <o> NRF_SDH_CLOCK_LF_XTAL_ACCURACY - External crystal clock accuracy used in the LL to compute timing windows.

    // <0=> NRF_CLOCK_LF_XTAL_ACCURACY_250_PPM
    // <1=> NRF_CLOCK_LF_XTAL_ACCURACY_500_PPM
    // <2=> NRF_CLOCK_LF_XTAL_ACCURACY_150_PPM
    // <3=> NRF_CLOCK_LF_XTAL_ACCURACY_100_PPM
    // <4=> NRF_CLOCK_LF_XTAL_ACCURACY_75_PPM
    // <5=> NRF_CLOCK_LF_XTAL_ACCURACY_50_PPM
    // <6=> NRF_CLOCK_LF_XTAL_ACCURACY_30_PPM
    // <7=> NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM

    #ifndef NRF_SDH_CLOCK_LF_XTAL_ACCURACY
    #define NRF_SDH_CLOCK_LF_XTAL_ACCURACY 0
    #endif
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