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Using Serialization on a nRF52832

Dear Nordic,

I have located the Serialization example project (using SPI) for the Connectivity board, but I cannot find an example project for the Application CPU board.

The Application board can be another type of CPU (i.e. not Nordic), so my question is: To support Serialization on a non-Nordic CPU, which Nordic files need to be included in the software build for that non-Nordic CPU? 

I have looked at the porting instructions but it does not seem to be what I am looking for. I looked at the Serialization files in the code from the SDK, and I think that the following list of files (below) is what is needed - can you inform me if this is correct? 

The main files seem to be ser_phy.c and ser_hal_transport.c, with the others being included.

I think that the s/w interface for Serialization for a non-Nordic CPU is the file ser_phy.c, is that correct?

Can you provide a code example of Serialization being initialized and used on a non-Nordic CPU?

nRF5_SDK_14.2.0_17b948a\components\serialization\common\transport\ser_hal_transport.c
nRF5_SDK_14.2.0_17b948a\components\serialization\common\ser_config.h
nRF5_SDK_14.2.0_17b948a\components\serialization\common\transport\ser_phy\ser_phy.c
nRF5_SDK_14.2.0_17b948a\components\serialization\common\transport\ser_phy\ser_phy.h
nRF5_SDK_14.2.0_17b948a\components\serialization\common\transport\ser_hal_transport.h
nRF5_SDK_14.2.0_17b948a\components\device\nrf.h
nRF5_SDK_14.2.0_17b948a\components\softdevice\s132\headers\nrf_error.h
nRF5_SDK_14.2.0_17b948a\components\libraries\util\app_error.h
nRF5_SDK_14.2.0_17b948a\components\libraries\util\sdk_errors.h
nRF5_SDK_14.2.0_17b948a\components\libraries\util\nordic_common.h
nRF5_SDK_14.2.0_17b948a\components\libraries\util\app_error_weak.h

Regards,

Declan Traill

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  • Hi,

    There are multiple application side examples for serialization. They are located within other example directories. Please have a look at this page for an overview of which examples include serialization examples.

    Unfortunately, I'm not aware of any examples of non-Nordic serialization, but maybe you can get some inspiration from this thread? The serialization PHYs are described on this page. The Porting serialization libraries should describe the rest of what you need to implement this on another chip.

    Best regards,
    Jørgen

  • Hi Jørgen,

        Thanks for the reply. I have already seen those pages, but there isn't a list anywhere of which files are required to be included in the build for the Application CPU project. I have tried adding the files I listed above, and had to add app_error_weak.c, app_error.c, ble_serialization.h and cond_field_serialization.h also. Now it builds ok & also the device driver for the Application CPU SPI peripheral will need to be defined in ser_phy.c

    There is another question I have too: the SPI peripheral on the Application CPU I am using doesn't have SPI_REQ or SPI_RDY lines (it only has SPI_CSN, SPI_MOSI, SPI_MISO, SPI_CLK), can Serialization be made to work with this configuration over SPI?  Is there anything I need to configure/change in software to allow the SPI to work with 4 wires, or can I configure normal GPIO lines on the Application CPU to function as SPI_REQ & SPI_RDY lines?

    Regards,

    Declan Traill

Reply
  • Hi Jørgen,

        Thanks for the reply. I have already seen those pages, but there isn't a list anywhere of which files are required to be included in the build for the Application CPU project. I have tried adding the files I listed above, and had to add app_error_weak.c, app_error.c, ble_serialization.h and cond_field_serialization.h also. Now it builds ok & also the device driver for the Application CPU SPI peripheral will need to be defined in ser_phy.c

    There is another question I have too: the SPI peripheral on the Application CPU I am using doesn't have SPI_REQ or SPI_RDY lines (it only has SPI_CSN, SPI_MOSI, SPI_MISO, SPI_CLK), can Serialization be made to work with this configuration over SPI?  Is there anything I need to configure/change in software to allow the SPI to work with 4 wires, or can I configure normal GPIO lines on the Application CPU to function as SPI_REQ & SPI_RDY lines?

    Regards,

    Declan Traill

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