Current Consumption test on custom board using PPK

[Rishi]

I am using PPK 1.1.0 to compute current draw on a custom hardware.

If I upload ble_app_hrs example on the nRF52-DK and measure it directly, I obtain average reading as 550 uA.

However, running the same application on my custom board yields 1.2 mA of current draw.

The custom board uses Raytac modules: MDBT42 and MDBT42V, and is powered using External DUT connector with SW2 set as External and SW4 set as Regulator.

Do you have any insights on this huge current draw?

Thank you.

[Rishi]

Can I please have some response for this query?

Thank you.

[haakonsh]

Hey Rishi,

1. Do you have any other circuits and devices on your custom PCB that can draw additional current?
   If this is the case then you need to electrically isolate the module from the rest of your board when measuring the current.
2. Have you enabled any pull-ups, etc, on the module?
   If this is the case then you need to disable the pull-ups/downs before measurements.
3. Are you running the example as provided or have you made any modification for your custom PCB?
4. Can you show us your schematics and/or Layout files?

Cheers,

Håkon.

[Rishi]

Hi Hakon,

1. I do have few other passives and ICs in my design. I have three pulls-ups (10K each), 2 for TWI and one pull-up for an IC. 

2. I have not enable any internal pull-up. Do I need to get rid of external pul-ups?

3. I have been testing with stock examples without any changes. 

While I was waiting for a response from your end, I have isolated the Raytac module, and current consumption is almost equal to nRF5-DK. This is observed in ble_app_hrs example which is not power optimised. 

However, on running the power profiler example, during system-off sleep mode (when no button is pressed), DK consumes 60 nA current while the module consumes 530 nA current. This is inconsistent and I would like your opinion on this.

4. I am assembling my board one component at a time and performing a current consumption test in order to find out the root cause of high current consumption. Once I am done with this test, I shall share the design, if required, as a private ticket.

Thanks

[Rishi]

Hey Hakon,

I have isolated the problem. I have a LIS2DH12 accelerometer in my design. Assembling this accelerometer along with three by-pass capacitors (0.1 uF, 0.1 uF, 10 uF) and two pull-up resistors (10K each) for SDA and SCL lines, increases the current consumption to 7 mA.

Removing the pull-up resistors does not reduce the current consumption value either.

I am not even using or enabling the accelerometer. It is just being powered by the VDD rail. I am running ble_app_hrs example.

Any suggestions, what are the possible sources of this huge rise in current?

Thanks.

[haakonsh]

Hey Rishi,

My first thought is that there is a short circuit somewhere, either the LIS2DH12  footprint is wrong, the LIS2DH12 is mounted wrong, or the LIS2DH12 has an internal short circuit due to damage from ESD or kinetic impact. I suggest you write a simple application that tries to communicate with the LIS2DH12. If you are unable to read the device ID given the correct commands and a verified I2C communication, then the LIS2DH12 operating out of spec in some way or another.

FYI: The nRF5 series SoCs have internal 13k pull-up/downs available on each GPIO so I believe you do not need external pull-ups on the SDA and SCL lines. 

Cheers,

Håkon.