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Is there a minimum pulse width for a pin reset? (nRF52810)

ashwin

A time T_PINR is specified in the datasheet, as shown in the snippet below. 

Does this give me an indication of the pulse width for a pin reset? If so, how do I interpret this value? If not, what does this specification refer to, and how long would I need to pull the reset pin low (from an external MCU) in order to accomplish a pin reset? 

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  • +1

    Hi,

    No, the t_PINR parameter describes how long it will take for the nRF52's internal pull-up resistor to pull nRESET high, and hence de-assert the reset.

    To guarantee pin reset on the nRF52832 the nRESET pin should be pulled logic low (<0.3 * VDD) for a minimum of 0.2us. The chip will enter reset state on negative edge (<0.3 * VDD), and the chip will be released from pin reset on positive edge (0.7 * VDD).

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  • +1

    Hi,

    No, the t_PINR parameter describes how long it will take for the nRF52's internal pull-up resistor to pull nRESET high, and hence de-assert the reset.

    To guarantee pin reset on the nRF52832 the nRESET pin should be pulled logic low (<0.3 * VDD) for a minimum of 0.2us. The chip will enter reset state on negative edge (<0.3 * VDD), and the chip will be released from pin reset on positive edge (0.7 * VDD).

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