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nRF24LE1 External Pin Interrupts

Our intention is to wake up the nRFLEI from power-down using the external interrupts, perform some actions and return to power-down. There are three external control signals which need to do this.

I had someone do an evaluation in which they concluded that this would be possible, but I feel that is incorrect.

When I read the specification, in particular "Interrupt from pin GP INT0, GP INT1 or GP INT2 as selected by bits 3,4 or 5 in SFR INTEXP. Only one of the bits may be set at a time.", it sounds to me that only one of the pins can be set to cause the interrupt at a time.

Am I reading this correctly, or is this a status register which indicates where the interrupt occurred?

It's no problem to poll each of the three pins after receiving the interrupt and I imagine we can use some ultra low power OR gate to trigger the interrupt? Has anyone tackled a similar problem with this device? I imagine it's pretty common. 

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  • Hi,

     

    When I read the specification, in particular "Interrupt from pin GP INT0, GP INT1 or GP INT2 as selected by bits 3,4 or 5 in SFR INTEXP. Only one of the bits may be set at a time.", it sounds to me that only one of the pins can be set to cause the interrupt at a time.

    If you enable more than one GPINTx, then you have to have all enabled sources active in order for one interrupt to occur.

    I recommend using WUOPCx instead, then checking which IO is active after you have woken up.

    Am I reading this correctly, or is this a status register which indicates where the interrupt occurred?

    Interrupts in general can be found in chapter 9, more specific in the block diagram in chapter 9.2 in the PS:

    http://infocenter.nordicsemi.com/pdf/nRF24LE1_PS_v1.6.pdf

     

    GPINTx generates a IFP interrupt. Inputs enabled in WUOPCx generates the interrupt WUOPIRQ. 

     

    Best regards,

    Håkon

     

Reply
  • Hi,

     

    When I read the specification, in particular "Interrupt from pin GP INT0, GP INT1 or GP INT2 as selected by bits 3,4 or 5 in SFR INTEXP. Only one of the bits may be set at a time.", it sounds to me that only one of the pins can be set to cause the interrupt at a time.

    If you enable more than one GPINTx, then you have to have all enabled sources active in order for one interrupt to occur.

    I recommend using WUOPCx instead, then checking which IO is active after you have woken up.

    Am I reading this correctly, or is this a status register which indicates where the interrupt occurred?

    Interrupts in general can be found in chapter 9, more specific in the block diagram in chapter 9.2 in the PS:

    http://infocenter.nordicsemi.com/pdf/nRF24LE1_PS_v1.6.pdf

     

    GPINTx generates a IFP interrupt. Inputs enabled in WUOPCx generates the interrupt WUOPIRQ. 

     

    Best regards,

    Håkon

     

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