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nRF58232 UARTE RX EasyDMA Pointer

Hi,

I use EasyDMA with UART.

I'm in permanent reception and the received octects go directly into a memory buffer.

When the buffer is full, the writing starts again at the beginning.

    static uint8_t rxUarteBuffer[200]={0};
    
    NRF_UARTE0->SHORTS = (UARTE_SHORTS_ENDRX_STARTRX_Enabled << UARTE_SHORTS_ENDRX_STARTRX_Pos);
    NRF_UARTE0->RXD.PTR = (uint32_t)((uint8_t *) rxUarteBuffer);
    NRF_UARTE0->RXD.MAXCNT = sizeof(rxUarteBuffer);
    NRF_UARTE0->TASKS_STARTRX = 1;

NRF_UARTE0->RXD.AMOUNT is useless because there is no real end of transaction.

Nevertheless there must be a way to know where the next byte will be stored ?

How can I know where the pointer is in my buffer? I don't want to count the number of bytes received per interrupt (EVENTS_RXDRDY)

Someone can help me ?

Thanks in advance.

Best regards

Parents
  • Hi 

    There are basically two ways to know how many bytes have been written to the buffer: 

    a) Stop the RX by activating the STOPRX task, wait for the ENDRX event to occur, and read the number of bytes read in the RXD.AMOUNT register. 
        Since the RX pointer is double buffered you can pre-load the next buffer to be used, and use the ENDRX_STARTRX shortcut to start the RX immediately following the ENDRX event. 

    b) Count the number of RXDRDY events using a timer in counter mode and the PPI controller. 

    If b) is not an option you would have to go for a) 

    For more information on the UART receive mechanism, you can look here

    Best regards
    Torbjørn

  • Hi Torbjorn,

    Thanks for your answer.

    I didn't know PPI controller, I'll see that, if I've enough timer.

    But I don't understand that we can't get the next address where will be stored the next byte received. The Processor knows it, so why is it not feasible to get this information ? I find it really bad ...

  • Hi

    The PPI controller is a very useful peripheral that allows you to pass various control signals (events) from one peripheral to another without requiring any processor activity. For more information I would suggest you read the PPI chapter in the product specification. 

    MPS said:
    But I don't understand that we can't get the next address where will be stored the next byte received. The Processor knows it, so why is it not feasible to get this information ? I find it really bad ...

    This is just the way the UARTE peripheral is designed unfortunately. The processor doesn't know the next address, this is stored internally in the UARTE peripheral, and the UARTE peripheral doesn't expose any registers that would allow the processor to read this information while the UART RX is running. 

    Best regards
    Torbjørn

  • Many thanks for your answer. So I will do with what there is. probably with the PPI.

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