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What's the LDO vs DCDC efficiency difference (Reg0) in NRF52840 Rev 1?

Hi,

Ours is a battery (LiPo) operated device with VDDH= 3.0 to 4.2V. One of the reasons for using nRF52840 is to avoid an expensive external DCDC IC. But due to the Anomaly 197 (DCDC of REG0 not functional) in nRF52840, It seems we have no choice but to use LDO in Reg0 stage. So I am trying to find out how badly does this affect our battery life.

Questions:

1. For a varying Vddh (4.2-3V) and a fixed Vdd (=3V or 3.3V set by regout0 register), what's the efficiency of the LDO in Reg0 stage? The LDO efficiency is usually calculated as Vout*Iout/ (Vin*(Iin+Iq)). For this we need to know the quiescent current (Iq) of the LDO. How much is it? Is this mentioned anywhere in the documentation? We will need this information to make a call on whether to use the inbuilt nRF52840 LDO or an external DCDC for Vddh to Vdd conversion.

2. What happens if we set regout0 to have Vdd=3.6V and Vddh drops below that due to battery discharge. Does Vdd follow Vddh as expected in a normal LDO?

3. Can we dynamically change the Vdd voltage to maximise LDO efficiency? i.e. When Vddh in the range of 4.2-3.7V, we set Vdd=3.6V and as Vddh drops due to battery discharge, we change the regout0 register value to set Vdd at much lower value automatically via firmware (and then do a softreset). Objective is to minimise the difference between Vddh and Vdd which in turns maximise LDO efficiency. 

4. Is there any Rev 2 of nRF52840 in the pipeline when anomaly 197 (and hopefully 202) will get fixed? 

 

Parents
  • Hi Jishnu, 

    Q1: We do not have any public data on the quiescent current of the LDO or the DCDC of REG0 stage. I have raised this question internally and will come back to you on this.  

    Q2: I would expect that the VDD will follow VDDH, i.e. VDD = VDDH-0.3V, when VDDH drops below the output level set in the REGOUT0. However, I will have to confirm this internally with R&D. I have raised this question internally and will come back to you on this.  

    Q3: Yes, it is be possible to change the output of the REG0 LDO at run-time by modifying the REGOUT0 register in the UICR peripheral.  However, this will require you to readout all the UICR registers, temporally store the content, modify the __ register value in the readout content, erase the UICR registers and then re-write the modified register values. Note: This option is only available if the access port protection(APPROTECT) feature is disabled. Erasing the UICR registers is not possible if APPROTECT is enabled 

    Q4: Yes, we have identified a possible solution for both Errata 197 and 202. There will be a product change notice(PCN) a minimum 90 days before any change can take place(has not been issued yet), so I don't expect any fix to be available before late this year. We need time to ensure that the fixes for these issues, does not have any negative impact on already existing designs. 

    Since we do not expect a fix to be available before late 2018 our current recommendation is to NOT use REG0( both LDO and DCDC) and instead add external regulator for voltages above 3.6V and tie VDDH to VDD on nRF52840.

    Best regards

    Bjørn

  • Hi bjorn,

    In Question 2, you said to confirm this with R&D.
    Could you share the information ?

    Best regards,
    uba

  • Hi Uba, 

    This is the reply i got from R&D:

    Regout0 max setting is 3.3V. The spec is min 300mV dropout, limiting input voltage to max 3.6V for guaranteed operation. When input supply drops further below 200mV dropout, the nRF will still work, but IDLE or SYSOFF modes will have increased current consumption ~100uA.

    If possible, would be better to use for example 3.0V setting for REG0 when used from Li-Ion

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