Hello all,
I'm currently working on a project with a due date coming up soon. I'm using two (2) nRF24L01's with a nRF24L01+PA+LNA shield.
Right now I have my micro controller (PYNQ) with a single nRF and then an Arduino running Tmrh20's nRF code. The Arduino is able to write/receive from another Arduino, but the problem is with my PYNQ.
My issue right now is that while my PYNQ nRF24L01 is able to receive a message and print the message out, the FIFO buffer isn't being emptied. As well, when I try and transmit a message from the nRF24, the TX buffer fills up with the message, but the message is never sent.
I've read a lot of community support forums on the web but it doesn't look like anyone is having similar issues to what I'm having right now. Here's a quick snapshot of my read code:
void startListening() {
setRegister(NRF_CONFIG, getRegister(NRF_CONFIG) | BV(PRIM_RX));
setRegister(NRF_STATUS, BV(RX_DR) | BV(TX_DS) | BV(MAX_RT));
gpio_write(gpio_device, 1); // CE = 1
if(pipe0_reading_address[0] > 0) {
setRegisterMulti(RX_ADDR_P0, pipe0_reading_address, addr_width);
}
else {
closeReadingPipe(0);
}
if(getRegister(FEATURE) & BV(EN_ACK_PAY)) {
flushTX();
}
}
void stopListening() {
gpio_write(gpio_device, 0); // CE = 0
delay_us(200);
if(getRegister(FEATURE) & BV(EN_ACK_PAY)) {
delay_us(200);
flushTX();
}
setRegister(NRF_CONFIG, getRegister(NRF_CONFIG) & ~BV(PRIM_RX));
setRegister(EN_RXADDR, getRegister(EN_RXADDR) | BV(child_pipe_enable[0]));
}
void readMessage_payload(u8* buf) {
u8 readFromBuffer[33];
readFromBuffer[0] = R_RX_PAYLOAD;
for(int i = 1; i < 33; ++i) {
readFromBuffer[i] = NOP;
}
spi_transfer(spi_device, (const char*)readFromBuffer, (char*)buf, 33); // readBuffer now has all data
}
u8* readMessage(u8* buf) {
stopListening();
while(hasMessages()) {
readMessage_payload(buf);
if(buf[1] != RXpacketCounters[buf[0]]) { // NOT Duplicate
RXpacketCounters[buf[0]] = ((RXpacketCounters[buf[0]] + 1) & (PACKET_CNTER - 1));
startListening();
return buf;
}
}
startListening();
setRegister(NRF_STATUS, BV(RX_DR) | BV(TX_DS) | BV(MAX_RT));
returnBuff[0] = 15;
returnBuff[1] = 15;
return returnBuff;
}
Essentially what I am doing is having the nRF always in RX mode, and then when a message is available, the nRF switches PRIM_RX = 1, CE = 0 to move into StandBy-I mode, and then the nRF reads from the RX FIFO buffer, and then the nRF sets PRIM_RX = 0, CE = 1 to move back into RX mode.
However, the RX FIFO is never emptied after reading from it. I am able to successfully read a transmission, but I just keep reading that same transmission over and over again.
As well, similar things are happening on the TX side:
bool writePayload(u8* messageToSend) {
u8 messageToSendFinal[33];
messageToSendFinal[0] = W_TX_PAYLOAD;
for(int i = 0; i < 32; ++i) {
messageToSendFinal[i + 1] = messageToSend[i];
}
spi_transfer(spi_device, (const char*)messageToSendFinal, (char*)NULL, 33);
delay_us(450);
gpio_write(gpio_device, 1);
delay_us(450);
gpio_write(gpio_device, 0);
setRegister(NRF_STATUS, BV(RX_DR) | BV(TX_DS) | BV(MAX_RT));
if(getRegister(NRF_STATUS) & BV(MAX_RT)) {
flushTX();
return false;
}
return true;
}
bool writeMessage(u8 sendAddress, u8* message, u8 len) {
stopListening();
bool success;
if(myAddress == sendAddress) {
return false;
}
packetToSend[0] = myAddress;
packetToSend[1] = TXpacketCounters[sendAddress];
for(int i = 0; i < len; i = i + 1) {
packetToSend[i + 2] = message[i];
}
u8 spaceLeft = 30 - len;
for(int i = 0; i < spaceLeft; i = i + 1) {
packetToSend[i + len + 2] = 0;
}
openWritingPipe((BASE_ADDRESS + ((myAddress + ((MAX_NODES + 1) * sendAddress)))));
success = writePayload(packetToSend);
if(success == false) {
startListening();
delay_ms(TIMEOUT * sendAddress);
stopListening();
success = writePayload(packetToSend);
}
TXpacketCounters[sendAddress] = ((TXpacketCounters[sendAddress] + 1) & (PACKET_CNTER - 1) );
startListening();
return success;
}
I have the register values printed out on my console as soon as the nRF starts up, and before it issues a read or write. The registers look like this:
0x0 : 0b1111 0x1 : 0b111111 0x2 : 0b111110 0x3 : 0b11 0x4 : 0b1101111 0x5 : 0b1101100 0x6 : 0b111 0x7 : 0b1110 0x8 : 0b1111 0x9 : 0b0 0xa : 0b11101 0xb : 0b111 0xc : 0b1001 0xd : 0b1010 0xe : 0b1011 0xf : 0b1100 0x10 : 0b11101 0x11 : 0b100000 0x12 : 0b100000 0x13 : 0b100000 0x14 : 0b100000 0x15 : 0b100000 0x16 : 0b100000 0x17 : 0b10001
If anyone has any idea / thoughts for why the buffers aren't emptying even though I am reading/writing to them, I would love to know!
Best,
Bryan
