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SPI Slave CLK

Hi

I'm using two different designs using nRF51822 as SPI Slave. One is using p0.07 as CLK input and the other is using p0.06 as CLK input. I'm using the code from spi_slave.c/h without any changes.

The one using p0.07 works like a charm.

Using p0.06 adds a 90Mhz oscillating signal to the clock-pulses and consequently the SPI Slave doesn't understand it.

Are there any default-settings on p0.06 I have to shut off? I'm not using any analog stuff whatsoever.

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  • Some more findings: The clock-signal looks ok as long as I don't call spi_slave_init(..); After that call 90MHz is added to every clockpulse. I tried to cool it down by adding an inductor and that helped a little bit. The sine-wave now varies between 1,4V and 1,8V, instead 0f going all the way from 0 up to 2,2V, which it used to do. Is there any setting in spi_slave_init I can change to help the input? I've tried both pullup and pulldown (no visible change). I have aslo tried drive config S0H1 and S0D1, but no visible change there either. A diode in series instead of the inductor maybe...

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  • Some more findings: The clock-signal looks ok as long as I don't call spi_slave_init(..); After that call 90MHz is added to every clockpulse. I tried to cool it down by adding an inductor and that helped a little bit. The sine-wave now varies between 1,4V and 1,8V, instead 0f going all the way from 0 up to 2,2V, which it used to do. Is there any setting in spi_slave_init I can change to help the input? I've tried both pullup and pulldown (no visible change). I have aslo tried drive config S0H1 and S0D1, but no visible change there either. A diode in series instead of the inductor maybe...

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