Hi all,
I have ported my RTOS to nRF52832. It can run app and BLE properly. But when I measure the power consumption, the current is too high when BLE is enabled. Please see the below four figures.
(1) CPU is idle
(2) ADC (triggered by RTC2/PPI) sampling at 100Hz
(3) BLE advertising at 4Hz
(4) ADC + BLE
The current is measured by a series resistor and OPA, 1mA = 1V on scope channel 1 (yellow). Full screen average of channel #1 is measured as shown. For example, "Avg FS(1) = 4.0212V" indicates 4.0212mA.
In figure 1, the idle current is 62uA. This is because I download firmware through J-Link debugger. I let CPU free run but keep debugger connected. If I disconnect the cable, the current will drop. RTOS is running and a task will be scheduled to run every 125ms. The task actually does nothing and go to sleep immediately.
In figure 2. ADC is sampling at 100Hz. ADC is triggered fully by RTC2 and PPI so that CPU usage is the same. The peak current is high since some external analog circuit will be enabled during conversion. The average is 600uA which matches my design target.
In figure 3. ADC is disabled and BLE is advertising at 4Hz. We can see 4 pulses per second. The problem is there is a base current, about 3.4mA.
In figure 4. ADC is sampling and BLE is advertising. There is also a base current, about 4mA (3.4mA + 600uA).
Here is my question: where does the 3.4mA come from? I expect the averaged added current from BLE advertising will be few uA, at most 100uA level, not mA.
In RTOS, the idle task looks like this:
void idleTask()
{
while (1) {
if (nrf_sdh_is_enabled())
sd_app_evt_wait();
else
asm(" WFI");
}
}
idleTask() will be scheduled to run when no other task needs to use CPU. The 3.4mA looks like the consumed current when CPU is in a busy loop... so, I think sd_app_evt_wait() doesn't put CPU into sleep mode. sd_app_evt_wait() should check some flags and then execute instruction WFI. Can anyone show me the code snippet of sd_app_evt_wait()? Or any idea?
NOTE: both LFCLK and HFCLK are using external crystals.
