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Problem with nrf51822 in spi slave mode

Hello all

I making some device with ARM core CPU with nRF51822.

I set CPU to SPI master and set nRF51822 to slave. And then I read some data from nRF51822, that was always "0x55" or "0xAA". That depend on configuration of POL and PHA in master side.

Do you guess what is wrong?

B. Regards,

  • You need to provide the delay between spi_cs_enable and spi_write, also between spi_cs_enable and spi_read

  • SPI slave(nRF51) using SPI_MODE_0(fixed. I can't change this side), and I try MODE_0~MODE_3 in master side. And I provide the delay between spi_cs_enable and spi_write, also between spi_cs_enable and spi_read, also.

    Master MODE_0: Write 0x33, Read: 0x55 Master MODE_1: Write 0x33, Read: 0xAA Master MODE_2: Write 0x33, Read: 0xAA Master MODE_3: Write 0x33, Read: 0xAA (Write means master to slave, Read means slave to master)

    I guess give waveform on the bus lines to you in tomorrow.

  • Ok, if you know that SPI slave mode is MODE_0, then SPI master mode should also be MODE_0. For the value 0xAA that you read when the master mode is MODE_1, MODE_2 or MODE_3, it is the DEF character and is clocked out on MISO most likely because the SPI slave has stalled.

  • My question is also, what data is in the m_tx_buf buffer. When spi_slave_event_handle is entered, the SPI transaction is finished and you have already sent the data in the m_tx_buf buffer to the SPI master. Your loopback function writes the data into the m_tx_buf buffer but that will only be sent to the master next time the SPI master clocks out a byte. So my guess is that if you clock out another byte, then you might get 0x33 back to the SPI master. Also, is the RX_BUF_SIZE == 1? If not, code execution will not exceed the error check APP_ERROR_CHECK_BOOL.

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