The max amount of time can be spent in WDT interrupt

[Maryam]

Hi! 

As far as understood, there are only 2 clock cycles before the Watchdog timer reset occurs. Is there a way to change/set this to a different value? I need to write in the flash that watchdog is resetting my device. and 2clock cycles are not enough! 

Regards,

[Andy]

You don't need to write to flash. I write a code to the GPREGRET in order to stay in bootloader after a watchdog reset. You could do the same for whatever purpose you need.

[Einar Thorsrud]

That is true. But you should be aware that the content of GPREGRET is not guaranteed after a watchdog reset (see Reset behavior table). So a CRC or similar to validate it is recommended.

[Andy]

I don't see anything there that says that it's not guaranteed. At least it has been working consistently for me ever since I implemented it. The RESETREAS is not supported, that's what I can see.

[Einar Thorsrud]

Referring to the table I linked to in my previous post, you can see the 'x' in the intersection between the "Watchdog reset" and "Retained registers". This indicates that the retained registers are reset by a watchdog reset. However, what this really means is that the content is not guaranteed. In practice it should work most of the time (perhaps always), as you write.

[Andy]

Oh, so then the RESETREAS register does work