SPI power consumption

[mjkranz]

We are using the 52840 chip SPI interface in slave mode and communicating at about 8MHz are noticing that during periods of innactivity with all systems stopped and sleeping we are seeing 15-20 microamps of current draw. I we disable the SPI port we get 2 microamps of current draw until we enable a SPI port then we see 15-20 microamps of current draw again. The rest of the SPI interface is functioning normally when we are communicating with it but the power draw between communications is way too high for us.

The datasheet on page 532 says that the SPI port should only draw about 1 microamp of current when enabled and innactive.

I see lots of discussion on SPI errata or configuration issues on the older 52832 chips but not a lot on the 52840.

Does the 52840 chip have an issue also that would cause the chip to use more power when the SPI peripheral is enabled?

My first thought is to disable the SPI port and change back to standard I/O when the system chip select is in an innactive state but then reenable the SPI port quickly when I see the chip select line go low.

Is what we are seeing normal or caused by some errata and if so is there a better work around for the peripheral power usage when innactive.

Edit

My SDK is :SDK V15.

We used the Nordic DK PCA10056 to test the consumption and found similar results.

This is the code we are using for SPIS enable

void SPIS_Init(){

    nrf_drv_spis_config_t spis_config = NRF_DRV_SPIS_DEFAULT_CONFIG;         

    spis_config.csn_pin               = 26;

    spis_config.miso_pin              = NRF_GPIO_PIN_MAP(1, 2);

    spis_config.mosi_pin              = NRF_GPIO_PIN_MAP(1, 1);

     spis_config.sck_pin               = 8;

                spis_xfer_done = true;

                APP_ERROR_CHECK(nrf_drv_spis_init(&spis, &spis_config, spis_event_handler));

}

 

This is the code we have done for SPIS disable testng

                                while(NRF_SPI1->ENABLE != 0)

                                {

                                                nrf_drv_spis_uninit(&spis);

                                                 nrf_gpio_cfg_default(26);

                                                nrf_gpio_cfg_default(8);

                                                nrf_gpio_cfg_default(NRF_GPIO_PIN_MAP(1, 2));

                                                nrf_gpio_cfg_default(NRF_GPIO_PIN_MAP(1, 1));

                                 }             

 

[Stian Røed Hafskjold]

The SPIS peripheral consumes about 20 uA in idle in order to detect the CSN signal. If you want lower power consumption I think the solution is to use the GPIO PORT event to trigger on the CSN pin, initialize the SPIS and then disable SPIS before going to sleep.

[Romain]

Hi,

For our application we need ultra low power consumption too.

Previously we used the nRF8001 and were able to achieve around 15uA when there was no active communication on SPI for the whole device (MCU host + nRF), now we are more around 25-30uA in comparison.

I found different posts on that topic but more based on nRF5 SDK as here.

Should Zephyr/NCS better manage the SPIS to achieve near zero current (less than 5uA) or is it still necessary to disable SPIS when possible (wakeup by port interrupt on CNS pin) ?

Best regards,

Romain