Change to description of nRF52850 SAADC RESULT.PTR

[craig.goldman]

I recently downloaded nRF52840_PS_v1.0 and noticed a change in the register description for the SAADC RESULT.PTR (p. 365).  A note was added that states...
"Only bits 29 and 15..0 are implemented.  Writing a value which is not in the 0x2000nnnn range will not read back correctly."

Does this mean that SAADC EasyDMA can write results only to the first 64K bytes of RAM and not the full 256K RAM in the nRF52840?

[MartinBL]

Yes, that is what it means. It seems like the DMA functionality was "copy-pasted" from the nRF52832 design which only supports 64k of RAM and unfortunately this limitation got carried along. It is unclear to me whether it has been fixed though, so I have asked the designers for a clarification.

PS: It is holiday season in Norway at the moment, and a lot of the designers are on holiday. Hence it might take a few days to get a response. 

[craig.goldman]

Thank you.  I would appreciate a follow-up with the information from the designers to know whether I need to modify my code to account for this change.

[MartinBL]

Hi,

I got the word from the designers today. The issue has been fixed and we just forgot to update the Product Specification. You are free to use the full 256k of RAM on your device.