Hello we have a more stable external reference voltage source than the VBG for the ADC we want to use.
The voltage itself is higher than the allowed reference voltage specified for the AREF pins, thus we want to use a voltage divider to lower the voltage accordingly.
The question is if the ADC draws a current through the AREF pins during operation which would put load on the voltage divider and might distort our measurement.
Do we need to take such a behavior into account or can we assume a high impedance on the AREF pins at all times if used as external reference voltage?
In the reference manual and the product specification I could only find this information for the AIN* pins.
Hello,I have checked with one of our ADC experts, and he said that it will draw some current. There is a resistor ladder on the pins. He didn't remember the values of these, so he will check. Unfortunately, he is not back in the office until Friday, but he promised to check then. I will get back to you as soon as I know something more. Sorry for the delay.
thank you for the reply. I will for now reserve space for 2 capacitors at the AREF pin. I would greatly appreciate if you could add a few more details in how to determine the correct dimension and how it effects the sampling frequency once your collegue is back.
The document you provided for the AIN pins for calculating the capacitor size and sampliing frequency has been a great help so far (devzone.nordicsemi.com/.../1401.ADC-voltage-divider-_2D00_-calculating-capacitor-size-v2.pdf).
I got a reply just now. He wrote:
"There are two resistors connected to the external reference:
- Typically ca 120k resistor connected half the reference voltage
- Typically ca 240k resistor connected to ground"
I am not sure I get what you are saying?
We try to reduce the 3V source to the 1.2 V for the AREF pin.Are the resistor values you are talking about for the voltage divider (they seem to fit for a supply voltage of 1.8V) or are you talking about internal resistors?Best regards, Jan
The resistors are internal. The internal circuit (at block level) is similar to this one https://patents.google.com/patent/US8947280 . However, the Rref will not be disconnected from the external reference, so you'll see that 120k load to Vref/2 when the ADC is enabled.