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When to TX and when to RX

I am evaluating a front end module by skyworks 66111 output power is ~14dBm. The FEM requires that logic dictate when to transmit and when to receive. When CRX, pin 17, is low and CTX, pin 19 is high, the device is transmitting. In the opposite configuration the device is receiving. The only other configuration allowable is when both are zero or the device is sleeping. I would like to get a test set up as easily as possible to see accurate bidirectional communication, but could start with unidirectional if necessary. I could use some guidance with creating firmware for the two pins connected from the nRF52832 toggling the state of the FEM in accordance with the nRF52832 radio needing to receive or transmit and the state of the soft stack.

Thank you for your consideration of my problem.

Cy Drollinger

Electronic Realization 

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  • Hi,

    Please try the configuration below, it should work, but haven't tested with an actual FEM. 

    #include "nrf_drv_ppi.h"
    #include "nrf_drv_gpiote.h"
    
    
    #define  CTX_PIN             //
    #define  CRX_PIN             //
    
    #define  FEM_CPS             //
    #define  FEM_CHL             // 
    #define  FEM_CSD             //
    
    
    // Initialize after ble_stack_init()
    void fem_init(void)
    {
       
        ret_code_t                      err_code;
        ble_opt_t                       opt;
        uint32_t                        gpiote_ch;
        nrf_ppi_channel_t               ppi_set_ch;
        nrf_ppi_channel_t               ppi_clr_ch; 
        nrf_drv_gpiote_out_config_t     config = GPIOTE_CONFIG_OUT_TASK_TOGGLE(false);
        
        /*Configure static pins*/
        nrf_gpio_pin_clear(FEM_CPS);
        nrf_gpio_cfg_output(FEM_CPS);
        
        nrf_gpio_pin_set(FEM_CHL);
        nrf_gpio_cfg_output(FEM_CHL);
        
        nrf_gpio_pin_set(FEM_CPS);
        nrf_gpio_cfg_output(FEM_CPS);
    
    
        /* Optional: use PPI and GPIOTE drivers to reserve channels for PA/LNA control. Not neccessary if application makes sure to not use same channels for other tasks*/
        err_code = nrf_drv_gpiote_init();
        if(err_code != NRF_ERROR_INVALID_STATE)
        {
            APP_ERROR_CHECK(err_code);
        }
        
        err_code = nrf_drv_ppi_init();
        if(err_code != NRF_ERROR_INVALID_STATE)
        {
            APP_ERROR_CHECK(err_code);
        }
        
        err_code = nrf_drv_ppi_channel_alloc(&ppi_set_ch);
        APP_ERROR_CHECK(err_code);
        
        err_code = nrf_drv_ppi_channel_alloc(&ppi_clr_ch);
        APP_ERROR_CHECK(err_code);
        
        err_code = nrf_drv_gpiote_out_init(CRX_PIN, &config);
        APP_ERROR_CHECK(err_code);
                
        gpiote_ch = nrf_drv_gpiote_out_task_addr_get(CRX_PIN); 
        
        //common PA/LNA config
        memset(&opt, 0, sizeof(ble_opt_t));
        opt.common_opt.pa_lna.gpiote_ch_id  = (gpiote_ch - NRF_GPIOTE_BASE) >> 2;   // GPIOTE channel used for radio pin toggling
        opt.common_opt.pa_lna.ppi_ch_id_clr = ppi_clr_ch;                           // PPI channel used for radio pin clearing
        opt.common_opt.pa_lna.ppi_ch_id_set = ppi_set_ch;                           // PPI channel used for radio pin setting
        
        // CTX pin control (PA config)
    
        opt.common_opt.pa_lna.pa_cfg.active_high = 1;                    // Set the pin to be active high
        opt.common_opt.pa_lna.pa_cfg.enable      = 1;                    // Enable toggling
        opt.common_opt.pa_lna.pa_cfg.gpio_pin    = CTX_PIN;              // The GPIO pin to toggle
        
        // CRX pin control (LNA config)
        
        opt.common_opt.pa_lna.lna_cfg.active_high  = 1;                      // Set the pin to be active high
        opt.common_opt.pa_lna.lna_cfg.enable       = 1;                      // Enable toggling
        opt.common_opt.pa_lna.lna_cfg.gpio_pin     = CRX_PIN;                // The GPIO pin to toggle    
    
        err_code = sd_ble_opt_set(BLE_COMMON_OPT_PA_LNA, &opt);
        APP_ERROR_CHECK(err_code);    
        
    }

     

Reply
  • Hi,

    Please try the configuration below, it should work, but haven't tested with an actual FEM. 

    #include "nrf_drv_ppi.h"
    #include "nrf_drv_gpiote.h"
    
    
    #define  CTX_PIN             //
    #define  CRX_PIN             //
    
    #define  FEM_CPS             //
    #define  FEM_CHL             // 
    #define  FEM_CSD             //
    
    
    // Initialize after ble_stack_init()
    void fem_init(void)
    {
       
        ret_code_t                      err_code;
        ble_opt_t                       opt;
        uint32_t                        gpiote_ch;
        nrf_ppi_channel_t               ppi_set_ch;
        nrf_ppi_channel_t               ppi_clr_ch; 
        nrf_drv_gpiote_out_config_t     config = GPIOTE_CONFIG_OUT_TASK_TOGGLE(false);
        
        /*Configure static pins*/
        nrf_gpio_pin_clear(FEM_CPS);
        nrf_gpio_cfg_output(FEM_CPS);
        
        nrf_gpio_pin_set(FEM_CHL);
        nrf_gpio_cfg_output(FEM_CHL);
        
        nrf_gpio_pin_set(FEM_CPS);
        nrf_gpio_cfg_output(FEM_CPS);
    
    
        /* Optional: use PPI and GPIOTE drivers to reserve channels for PA/LNA control. Not neccessary if application makes sure to not use same channels for other tasks*/
        err_code = nrf_drv_gpiote_init();
        if(err_code != NRF_ERROR_INVALID_STATE)
        {
            APP_ERROR_CHECK(err_code);
        }
        
        err_code = nrf_drv_ppi_init();
        if(err_code != NRF_ERROR_INVALID_STATE)
        {
            APP_ERROR_CHECK(err_code);
        }
        
        err_code = nrf_drv_ppi_channel_alloc(&ppi_set_ch);
        APP_ERROR_CHECK(err_code);
        
        err_code = nrf_drv_ppi_channel_alloc(&ppi_clr_ch);
        APP_ERROR_CHECK(err_code);
        
        err_code = nrf_drv_gpiote_out_init(CRX_PIN, &config);
        APP_ERROR_CHECK(err_code);
                
        gpiote_ch = nrf_drv_gpiote_out_task_addr_get(CRX_PIN); 
        
        //common PA/LNA config
        memset(&opt, 0, sizeof(ble_opt_t));
        opt.common_opt.pa_lna.gpiote_ch_id  = (gpiote_ch - NRF_GPIOTE_BASE) >> 2;   // GPIOTE channel used for radio pin toggling
        opt.common_opt.pa_lna.ppi_ch_id_clr = ppi_clr_ch;                           // PPI channel used for radio pin clearing
        opt.common_opt.pa_lna.ppi_ch_id_set = ppi_set_ch;                           // PPI channel used for radio pin setting
        
        // CTX pin control (PA config)
    
        opt.common_opt.pa_lna.pa_cfg.active_high = 1;                    // Set the pin to be active high
        opt.common_opt.pa_lna.pa_cfg.enable      = 1;                    // Enable toggling
        opt.common_opt.pa_lna.pa_cfg.gpio_pin    = CTX_PIN;              // The GPIO pin to toggle
        
        // CRX pin control (LNA config)
        
        opt.common_opt.pa_lna.lna_cfg.active_high  = 1;                      // Set the pin to be active high
        opt.common_opt.pa_lna.lna_cfg.enable       = 1;                      // Enable toggling
        opt.common_opt.pa_lna.lna_cfg.gpio_pin     = CRX_PIN;                // The GPIO pin to toggle    
    
        err_code = sd_ble_opt_set(BLE_COMMON_OPT_PA_LNA, &opt);
        APP_ERROR_CHECK(err_code);    
        
    }

     

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